Memory Sub-System CXL Memory Storage Allocation

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Solution Overview

Problem

Current memory sub-systems, such as solid-state drives, face challenges in efficiently providing both memory services and storage services over a physical connection, particularly in managing volatile and non-volatile memory configurations to ensure data preservation during power failures and optimizing memory allocation for cache-coherent memory access.

Innovation Solution

Implementing a memory sub-system with a host interface that supports Compute Express Link (CXL) protocols, allowing for the configuration of volatile memory to provide cache-coherent memory services and storage services, with optional backup power to ensure data preservation during power failures, and enabling dynamic allocation of memory based on query responses from the host system.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a memory sub-system is configured to provide both memory services and storage services over a physical connection, then service versatility is improved, but device complexity increases

Engineering Contradiction:
Improveservice versatilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory sub-system is designed to perform multiple functions through a unified interface. The same physical connection and controller can provide both memory services (via load/store instructions for byte-level access) and storage services (via read/write commands for block-level access), eliminating the need for separate interfaces and reducing overall system complexity despite the added versatility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory resources are segmented into different portions: a first portion configured for memory services and a second portion configured for storage services. This segmentation allows the system to manage different access patterns and service types independently while maintaining a unified interface, thereby reducing the complexity of managing multiple separate service mechanisms.

Inventive Principle:
Principle #1Segmentation

2Speed

If volatile memory is configured to provide cache-coherent memory services, then memory access performance is improved, but data preservation reliability deteriorates during power failures

Engineering Contradiction:
Improvememory access performanceVSAvoiddata preservation reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

A backup power source is integrated into the memory sub-system to provide power during unexpected power failures. This cushioning mechanism ensures that data in the volatile memory can be preserved during transient power interruptions, maintaining reliability without sacrificing the performance benefits of volatile memory for cache-coherent access.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

Different portions of the memory sub-system have different characteristics: the first portion uses volatile memory for high-speed cache-coherent access, while the second portion uses non-volatile memory for persistent storage. This local differentiation allows each portion to optimize for its specific function, with the backup power source protecting the volatile portion's data integrity.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If dynamic memory allocation is implemented based on host queries, then adaptability to host requirements is improved, but response time increases

Engineering Contradiction:
Improveadaptability to host requirementsVSAvoidresponse time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The memory sub-system maintains capability data that describes its memory attachment capabilities, including information about available memory portions and their characteristics. This pre-prepared information allows the host system to make informed allocation decisions without requiring complex real-time queries, thereby reducing response time while maintaining adaptability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a query-response mechanism where the host system queries the memory sub-system about its capabilities, and the memory sub-system responds with capability data. This feedback loop enables dynamic allocation decisions based on actual system state, balancing adaptability with reasonable response times through efficient data exchange protocols.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20240176745A1Identification of Available Memory of a Data Storage Device Attachable as a Memory Device
Publication Date: 2024.05.30 MICRON TECHNOLOGY INC
  • US20240176745A1 patent drawing
  • US20240176745A1 patent drawing
  • US20240176745A1 patent drawing

AI summary

A host system connected to a memory sub-system via a connection to query memory attachment capabilities of the memory sub-system in providing memory services over the connection. The memory sub-system can allocate a portion of its memory resources to provide storage services to the host system, and allocate another portion of its memory resources to provide memory services to the host system. In response to the query, the memory sub-system can provide a response containing data indicative of memory attachment capabilities of the memory sub-system. The host system can configure the memory services of the memory sub-system, such as a solid-state drive, based on the data received as a response to the query. The query and response can be implemented in the protocol over the connection for storage access, or in the protocol over the connection for memory access.