CXL SSD Atomic Operations via Host-Managed Volatile Memory
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Solution Overview
Problem
Conventional solid-state drives (SSDs) face challenges in providing both memory and storage services while ensuring data integrity during power failures, as they typically rely on internal backup power sources that limit the volatile memory capacity and do not allow for seamless atomic operations to be completed or rolled back in case of interruptions.
Innovation Solution
An SSD configured to provide both memory and storage services over a Compute Express Link (CXL) connection, using a portion of its volatile memory to implement atomic operations that can be either fully executed or entirely undone, with an in-progress flag and recovery queues ensuring data integrity and consistency across power failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If internal backup power sources are used to maintain data integrity during power failures, then data reliability is improved, but volatile memory capacity is limited and device complexity increases
Solution Approach 1:
The patent extracts the backup power source from the SSD and relocates it to the host system. The host system's power source directly powers the volatile memory in the SSD, eliminating the need for internal backup power while maintaining data integrity through the host's power management. This allows significantly larger volatile memory capacity without the constraints of internal backup power limitations.
Solution Approach 2:
The patent makes the host system's power source serve dual purposes: powering both the host system itself and the SSD's volatile memory. This universal power approach eliminates the redundant backup power source in the SSD while maintaining reliability, as the host's power management ensures continuous operation during power transitions.
2Adaptability or versatility
If conventional SSDs provide both memory and storage services, then service versatility is improved, but the ability to ensure atomic operations is worsened due to lack of seamless commit or rollback mechanisms
Solution Approach 1:
The patent implements a feedback mechanism where the host system continuously monitors the power state and actively manages the volatile memory content. The host receives feedback about power failures and can initiate rollback operations or ensure commit operations are completed, providing atomic operation guarantees that conventional SSDs cannot achieve independently.
Solution Approach 2:
The host system acts as an intermediary between the power source and the SSD's volatile memory. It mediates the power connection, managing power transitions and coordinating with the SSD to ensure atomic operations are either fully committed or fully rolled back, eliminating the reliability issues of independent SSD power management.
3Quantity of substance
If volatile memory capacity is increased in SSDs with internal backup power, then data buffering capability is improved, but the weight and power consumption increase
Solution Approach 1:
The patent extracts the backup power source from the SSD, eliminating the need for additional power management circuitry and energy reserves within the SSD. The volatile memory is powered directly by the host's power source, allowing larger memory capacity without the proportional increase in power consumption that would result from adding internal backup power capacity.
Data Source
AI summary
A computing device having a computer express link (CXL) connection between a memory sub-system and a host system and a flag configured to indicate an atomic operation being in progress in the memory sub-system. Over the connection, the memory sub-system can attach a portion of its fast, random access memory as a memory device, and a non-volatile memory as a storage device. The flag is set in the memory device accessible to the host system via a cache-coherent memory access protocol, before execution of commands of the atomic operation. After the completion of the atomic operation, the flag is cleared off the memory device. During a recovery from an interruption, the host system can check the flag to decide whether to restart or start the atomic operation again, or undo the partially executed the atomic operation.