CXL Storage Map Buffering Using Shared CXL Memory
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in managing large amounts of map data without requiring a high-capacity buffer memory, which is costly and limits the scalability of storage devices.
Innovation Solution
The implementation of a Compute Express Link (CXL) storage system that utilizes a partial area of a CXL memory as a buffer memory, allowing for the management of large map data without a dedicated high-capacity buffer memory within the storage device, using a homogeneous interface for communication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a high-capacity buffer memory is used in the storage device to manage large map data, then the storage device can handle larger flash memory capacities, but the cost and device complexity increase significantly
Solution Approach 1:
The patent extracts the buffer memory function from the storage device and relocates it to the host system memory. The storage device only maintains essential mapping information, while the host manages the majority of map data in its own memory space, reducing the storage device's buffer requirements and complexity.
Solution Approach 2:
The host system memory serves multiple functions: it acts as the storage device's buffer memory for map data, maintains the file system, and performs general system memory functions. This multi-functionality eliminates the need for a dedicated high-capacity buffer in the storage device.
2Quantity of substance
If a high-capacity buffer memory is dedicated to the storage device, then large map data can be managed, but the cost increases due to new research and development requirements
Solution Approach 1:
The host system provides the buffer memory service for the storage device using its own existing memory resources. The host manages the map data in its memory space, eliminating the need for the storage device to incorporate expensive high-capacity buffer memory, thereby reducing manufacturing costs and R&D requirements.
3Productivity
If the storage device uses a large buffer memory for map data, then address translation can be performed efficiently, but the loss of system memory for other purposes increases
Solution Approach 1:
The patent implements a dynamic memory allocation scheme where the host can flexibly allocate memory space for map data based on current system needs. The buffer memory for map data is not fixed but can be dynamically adjusted, allowing the system to maintain address translation efficiency while preserving memory availability for other purposes when needed.
Data Source
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AI summary
A system includes a first compute express link (CXL) storage device, a second CXL storage device, a first CXL memory device, and a CXL switch connected to the first CXL storage device, the second CXL storage device and the first CXL memory device through a CXL interface, the CXL switch configured to arbitrate communications between the first CXL storage device and the second CXL storage device, and the first CXL memory device. The first CXL memory device is configured to store first map data of the first CXL storage device and second map data of the second CXL storage device, the first CXL storage device is configured to exchange at least a portion of the first map data with the first CXL memory device through the CXL switch, and the second CXL storage device is configured to exchange at least a portion of the second map data with the first CXL memory device through the CXL switch.