CXL Switch Memory Sharing for High-Capacity Storage Map Data
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Solution Overview
Problem
The increasing capacity of NAND flash memory in storage devices requires a high-capacity buffer memory to manage map data, leading to increased costs and limitations in existing systems due to the limited capacity of buffer memories.
Innovation Solution
A computing system incorporating a CXL switch and memory device that uses a common interface for communication between storage devices and a buffer memory, allowing for the allocation of a partial area of a CXL memory as a buffer, thereby managing map data efficiently without the need for separate buffer memories in each storage device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the capacity of NAND flash memory is increased, then the storage capacity is improved, but the capacity of map data increases requiring larger buffer memory which increases costs
Solution Approach 1:
The patent combines multiple storage devices into a single storage system that shares a common buffer memory through a CXL switch. Instead of each storage device having its own separate buffer memory, the system merges the buffer resources so that one buffer memory serves multiple storage devices, thereby reducing the total buffer memory capacity needed while supporting increased storage capacity
Solution Approach 2:
The common buffer memory is designed to serve multiple storage devices simultaneously, making it a universal resource. The CXL switch enables the buffer memory to handle requests from different storage devices through a unified interface, allowing the same buffer resources to be shared across multiple devices without requiring dedicated buffer memory for each device
2Speed
If separate buffer memories are provided in each storage device, then data access performance is improved, but device complexity and cost increase
Solution Approach 1:
The CXL switch acts as an intermediary between the host and the storage devices, managing data access requests to the common buffer memory. This mediator enables multiple storage devices to access the shared buffer memory efficiently without requiring each device to have its own dedicated buffer, thus maintaining data access performance while reducing device complexity
Solution Approach 2:
The patent segments the buffer memory access into different logical channels through the CXL switch, allowing simultaneous access from multiple storage devices. The physical buffer memory is segmented into logical regions that can be allocated to different storage devices as needed, enabling efficient data access performance without requiring physical separation of buffer memories
Data Source
AI summary
A computing system includes a first storage device, a second storage device, a memory device, and a compute express link (CXL) switch. The memory device stores first map data of the first storage device and second map data of the second storage device. The CXL switch is connected with the first storage device, the second storage device, and an external host through a first interface, and arbitrates communications between the first storage device, the second storage device, and the external host. The first storage device is connected with the memory device through a second interface. The second storage device is connected with the memory device through a third interface. The first interface, the second interface, and the third interface are physically separated from each other.