Cyclic Charge-Subtraction A/D Converter for High-Resolution Sensing
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Solution Overview
Problem
Incremental delta type A/D converters face challenges with increasing resolution, requiring more cycles for conversion and higher accuracy in comparator quantization, which is difficult to achieve due to errors in capacitive and resistive element values, especially as resolution increases.
Innovation Solution
An A/D converter configuration that includes an integrator with operational amplifiers, feedback capacitors, and a D/A converter performing cyclic operations of subtraction and amplification based on quantization results, reducing the number of cycles and maintaining low comparator accuracy requirements even at high resolutions, while avoiding feedback switching errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If incremental delta type A/D converter is used to increase resolution, then conversion precision is improved, but number of cycles required increases and comparator accuracy requirement increases
Solution Approach 1:
The patent divides the feedback path into multiple parallel feedback capacitors (first feedback capacitor and second feedback capacitor) instead of using a single feedback capacitor. This segmentation allows the system to perform subtraction operations using different capacitor combinations, enabling high-resolution conversion with fewer cycles by processing multiple bits simultaneously through parallel feedback paths.
Solution Approach 2:
The patent introduces a new operational dimension by implementing both subtraction operation and cyclic operation modes. The subtraction operation subtracts charges from multiple feedback capacitors simultaneously, while the cyclic operation sequentially subtracts and amplifies charges. This dimensional change in operation methodology enables achieving high resolution without proportionally increasing the number of conversion cycles.
2Measurement precision
If incremental delta type A/D converter is used to increase resolution, then conversion precision is improved, but comparator accuracy requirement increases
Solution Approach 1:
The patent segments the feedback mechanism into multiple discrete capacitors that can be selectively connected in parallel or series configurations. This segmentation allows the system to achieve high effective resolution through capacitor combination rather than relying solely on high-precision comparators, thereby reducing the manufacturing precision requirements for individual comparator components while maintaining high overall conversion precision.
Solution Approach 2:
The patent dynamically changes the effective feedback capacitance value by switching between different capacitor combinations (first feedback capacitor alone, second feedback capacitor alone, or both in parallel). This parameter change capability allows the system to adjust its operation mode based on the required resolution, achieving high precision conversion with fewer cycles and reduced comparator accuracy requirements by optimizing the feedback capacitance for each conversion phase.
3Measurement precision
If feedback switching is implemented to achieve high resolution, then conversion precision is improved, but feedback switching errors increase
Solution Approach 1:
The patent divides the feedback function across multiple dedicated capacitors with fixed connections to the operational amplifier, eliminating the need for complex switching mechanisms to change feedback capacitance values. Each capacitor has a predetermined connection path, reducing switching operations and associated errors while maintaining the ability to achieve high resolution through selective capacitor engagement in parallel or series configurations.
Solution Approach 2:
The patent introduces a capacitor selection mechanism that acts as an intermediary between the input signal and the feedback path. Instead of directly switching feedback capacitors during critical conversion phases, the system uses this intermediary selection stage to preconfigure the appropriate capacitor combination, thereby reducing the number and complexity of switching operations during the actual A/D conversion process and minimizing feedback switching errors.
Data Source
AI summary
An A/D converter includes an integrator having an operational amplifier, a first feedback capacitor, and a second feedback capacitor, a quantizer outputting a quantization result of an output signal of the operational amplifier, and a D/A converter having a D/A converter capacitor. The D/A converter capacitor has a first terminal connected to an input terminal of the operational amplifier and a second terminal connected to an output terminal of the operational amplifier. The D/A converter performs a subtraction operation by repeating subtraction of charges accumulated in the first and second feedback capacitors based on the quantization result, and performs a cyclic operation by sequentially repeating subtraction and amplification of the charges accumulated in one of the first and second feedback capacitors based on the quantization result.