QC-LDPC Bit Interleaving Across Cyclic Blocks for Parallel BICM
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Solution Overview
Problem
Existing bit interleavers in BICM systems, such as those used in the DVB-T2 standard, face issues with impaired parallelism and limited configuration options due to the number of cyclic blocks not being a multiple of the number of columns, leading to increased latency and suboptimal performance, especially in iterative decoding scenarios.
Innovation Solution
A bit interleaver design that maps M bits of each constellation to different cyclic blocks and ensures all constellation words are mapped to only those blocks, dividing the interleaver into N/M sections for parallel processing, and applying section permutations to optimize the mapping of LDPC codeword bits onto constellation bits, thereby improving parallelism and reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If existing bit interleavers are used in BICM systems, then the system can process LDPC codewords, but parallelism is impaired and latency increases when the number of cyclic blocks is not a multiple of the number of columns
Solution Approach 1:
The interleaver is divided into multiple sections, where each section processes a subset of cyclic blocks. This segmentation allows parallel processing of different sections simultaneously, improving throughput and reducing latency when the total number of cyclic blocks is not a multiple of the number of columns.
Solution Approach 2:
The interleaver design dynamically adapts to different codeword lengths and numbers of cyclic blocks by configuring the number of sections and columns based on the input parameters. This dynamic configuration ensures optimal parallelism is achieved regardless of whether the cyclic block count is a multiple of the column count.
2Adaptability or versatility
If existing bit interleavers with fixed column configurations are used, then implementation is simple, but configuration options are limited and performance is suboptimal for iterative decoding
Solution Approach 1:
The interleaver design provides a universal framework that can be configured for different code rates, block lengths, and decoding scenarios (including iterative decoding). By parameterizing the number of sections, columns, and cyclic blocks, a single design can adapt to multiple applications without requiring separate specialized interleavers.
Solution Approach 2:
The interleaver performance is optimized by adjusting key parameters including the number of sections (based on cyclic block count and column count), the number of columns, and the mapping rules. These parameter changes allow the system to achieve optimal performance for different channel conditions and decoding requirements.
Data Source
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AI summary
A bit interleaving method involves applying cyclic block permutation process to a QC LDPC codeword made up of N cyclic blocks each including Q bits, a bit permutation process to the codeword after the cyclic block permutation process, and dividing the codeword, after the bit permutation process, into a plurality of constellation words each made up of M bits, the codeword being divided into N/M sections, each constellation word being associated with one of the N/M sections, and the bit permutation process being performed such that each of the constellation words includes one bit from each of M different cyclic blocks associated with a given section.