Cyclic DAC Reference Switching for Faster Voltage Conversion

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Solution Overview

Problem

Conventional digital to analog converters (DACs) often have longer conversion paths and larger maximum value changes, leading to slower conversion times and reduced efficiency compared to the proposed cyclic DAC, which uses a recursive equation to generate analog output voltage based on digital input codes, selecting reference voltages to minimize changes in output voltage.

Innovation Solution

The cyclic DAC employs a recursive equation to update output voltage by successively applying reference voltages, using the recursive formula Voutj = Voutj-1 + fi * Vref^2, where fi is determined by the digital input bits, to efficiently generate analog output voltage, with the ability to add, subtract, or leave unchanged the reference voltage before division by two, thereby reducing the length of the conversion path and maximum value changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional DACs use traditional conversion methods, then the conversion process is simpler to implement, but the conversion time is longer and the efficiency is lower

Engineering Contradiction:
Improveconversion efficiencyVSAvoidconversion time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the digital input code into multiple bits (b0, b1, b2, ..., bN-1) and processes them sequentially through multiple conversion stages. Each stage handles one bit and updates the output voltage incrementally, transforming a single complex conversion operation into multiple simpler staged operations that collectively achieve faster overall conversion

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by pre-defining the conversion algorithm and reference voltage selection criteria before actual conversion begins. The recursive formula and bit-weighted reference voltage selection are prepared in advance, allowing the converter to execute the conversion process rapidly without real-time computation delays

Inventive Principle:
Principle #10Preliminary action

2Speed

If conventional DACs use traditional conversion paths, then the circuit design is more straightforward, but the maximum value changes are larger leading to slower conversion

Engineering Contradiction:
Improveconversion speedVSAvoidconversion path complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent employs dynamic reference voltage selection where the reference voltage applied at each stage depends on the current output voltage and the value of the current bit being processed. This dynamic adjustment optimizes the voltage change magnitude at each step, maximizing conversion speed while managing circuit complexity through adaptive control

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameters of the conversion process by using a recursive conversion formula that adjusts the weighting of each bit based on its position and the current state of the output voltage. This parameter-based approach (using bit position weights and conditional reference voltage selection) achieves fast conversion without requiring overly complex circuit architecture

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8223056B2Cyclic digital to analog converter
Publication Date: 2012.07.17 NERA INNOVATIONS LTD
  • US8223056B2 patent drawing
  • US8223056B2 patent drawing
  • US8223056B2 patent drawing

AI summary

Some embodiments include apparatus and methods having an amplifier, a capacitor network coupled to the amplifier, and switching circuitry coupled to the amplifier and the capacitor network. The switching circuit is configured to successively apply a selected reference voltage selected from among a first reference voltage, a second reference voltage, and a third reference voltage to the capacitor network in response to a digital input code to generate an output voltage. Additional embodiments are disclosed.