Shallow Junction via Cyclic Epitaxial Growth
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Solution Overview
Problem
Conventional techniques for enhancing charge carrier mobility in transistors, such as using silicon/germanium or silicon/carbon alloys, often result in reduced strain components due to lattice damage or shallow cavity issues, which impede performance gains, especially in N-channel transistors with shallow drain and source regions.
Innovation Solution
The method involves forming cavities adjacent to the gate electrode with a selective epitaxial growth process that allows for a 'bottom to top' fill behavior of semiconductor alloys like silicon/carbon, enabling in situ doping of shallow drain and source regions while independently controlling the depth and strain-inducing material, thereby avoiding strain relaxation from ion implantation and achieving a high strain component in the channel region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If ion implantation is used to form shallow drain and source regions, then dopant concentration is improved, but lattice damage occurs which reduces strain component
Solution Approach 1:
The patent replaces the mechanical ion implantation process with a chemical epitaxial growth process. Instead of physically bombarding the substrate with ions, the dopant is introduced through chemical vapor deposition during the epitaxial growth of the semiconductor alloy, eliminating lattice damage while achieving the desired dopant concentration in shallow drain and source regions.
Solution Approach 2:
The patent changes the fundamental parameter of dopant introduction from physical implantation to chemical incorporation during growth. By controlling the epitaxial growth conditions and dopant delivery, the process achieves high dopant concentration without the lattice damage inherent in ion implantation, thereby maintaining the strain component in the channel region.
2Quantity of substance
If conventional epitaxial growth is used to fill cavities, then semiconductor alloy is deposited, but lateral growth rate exceeds vertical growth rate causing offset from channel region
Solution Approach 1:
The patent employs periodic alternation between epitaxial growth steps and etch steps to selectively remove laterally grown material. This cyclic process allows vertical growth to accumulate while periodically removing lateral overgrowth, thereby maintaining precise lateral alignment with the channel region while achieving the desired vertical fill depth.
Solution Approach 2:
The patent performs preliminary etching of the cavity sidewalls before epitaxial growth to create a surface that favors vertical over lateral growth. This preliminary surface preparation, combined with the periodic removal of lateral growth, ensures that the semiconductor alloy fills the cavity vertically with minimal lateral offset from the channel region.
3Speed
If channel length is reduced to increase operating speed, then transistor performance is improved, but short channel effects increase reducing controllability
Solution Approach 1:
The patent changes the physical state of the channel region by introducing strain through the embedded semiconductor alloy. This strain modification alters the carrier mobility and effective mass parameters, enabling high-speed operation even in short channel devices without suffering from the same degree of short channel effects, thereby maintaining controllability while achieving improved speed.
4Speed
If silicon/germanium or silicon/carbon alloys are used to enhance charge carrier mobility, then mobility is improved, but strain relaxation occurs reducing performance gains
Solution Approach 1:
The patent applies local quality by concentrating the strain-inducing semiconductor alloy specifically in the drain and source regions adjacent to the channel, rather than throughout the entire device. This localized placement maximizes the strain transfer to the channel region for enhanced carrier mobility while minimizing the total amount of alloy material, thereby reducing strain relaxation effects and maintaining performance gains.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly enhances the performance of N-channel transistors by maintaining a high strain component in the channel region, improving device performance without the limitations of conventional techniques.
Implementation Method 1
performing a selective epitaxial growth process for filling a semiconductor alloy in the cavities, wherein the epitaxial growth process has a first growth rate corresponding to the sidewall surface and a second growth rate corresponding to the bottom surface
Data Source
AI summary
A silicon/carbon alloy may be formed in drain and source regions, wherein another portion may be provided as an in situ doped material with a reduced offset with respect to the gate electrode material. For this purpose, in one illustrative embodiment, a cyclic epitaxial growth process including a plurality of growth/etch cycles may be used at low temperatures in an ultra-high vacuum ambient, thereby obtaining a substantially bottom to top fill behavior.