3D Memory Staircase Formation Using Cyclic Mask Slimming
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Solution Overview
Problem
In three-dimensional nonvolatile memories, efficiently connecting conductive layers in a stacked body to contacts while maintaining structural integrity and functionality remains a challenge.
Innovation Solution
A method involving the formation of a stacked body with alternating insulating and conductive layers, using mask layers and stopper layers to etch and slim the exposed layers, forming staircase-shaped conductive layers connected by contacts, ensuring electrical connectivity and structural stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conductive layers are stacked three-dimensionally to increase storage capacity, then memory density is improved, but manufacturing complexity and structural integrity become problematic
Solution Approach 1:
The patent divides the manufacturing process into multiple etching cycles, each creating a portion of the staircase structure. Mask layers are repeatedly formed and removed in segments, allowing complex three-dimensional patterns to be built incrementally from simpler two-dimensional steps, thereby reducing overall manufacturing complexity while achieving high memory density
Solution Approach 2:
The patent transitions from planar manufacturing to three-dimensional staircase structures by adding vertical etching dimensions. Multiple conductive layers are stacked and connected through vertically formed contact holes, utilizing the third dimension to increase storage capacity while maintaining manufacturability through systematic process steps
2Reliability
If mask layers are repeatedly formed and removed to create staircase structures, then electrical connectivity is improved, but manufacturing time and process steps increase
Solution Approach 1:
The patent performs preliminary slimming of the mask layer before each etching operation. This preliminary action ensures that the mask layer is at the optimal thickness for the subsequent etching step, improving etching uniformity and electrical connectivity while reducing the need for rework and additional process steps that would increase manufacturing time
Solution Approach 2:
The patent implements a continuous cyclic process where mask layer formation, slimming, and etching operations are repeatedly performed without breaking the manufacturing flow. Each cycle builds upon the previous one, maintaining continuous productive action that improves connectivity while minimizing idle time between operations
Data Source
AI summary
According to one embodiment, a method of manufacturing a semiconductor memory device includes: repeating multiple times of a process of etching away one pair of first and second insulating layers of a stacked body exposed from a second mask layer, among a plurality of first and second insulating layers, with retracting the second mask layer in a first direction toward a first side by slimming; removing the second mask layer undergone multiple times of the slimming; removing a first stopper layer exposed on the first side; and repeating multiple times of a process of etching away one pair of first and second insulating layers of the stacked body exposed from a first mask layer, among the plurality of first and second insulating layers, with retracting the first mask layer in the first direction by slimming.