Cyclic Spacer Etching for Sub-10nm Profile Control
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Solution Overview
Problem
Conventional patterning and lithography processes for sub-10 nm node structures, such as FinFETs, face challenges with asymmetric spacer profiles and line width roughness due to uneven plasma exposure and polymer material influences, leading to inconsistent critical dimensions and reduced throughput.
Innovation Solution
A cyclic spacer etching process involving inert plasma treatment and etchant plasma exposure is repeated to control the spacer profile, utilizing a capacitively-coupled plasma and specific process gases to modify and remove spacer material, with controlled pressures and biases to achieve a desired profile without polymer protective layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional spacer etching processes are used, then the etching process is simple and fast, but asymmetric spacer profiles and footing are formed due to uneven plasma exposure and polymer material influences
Solution Approach 1:
The etching process is divided into multiple discrete steps with alternating plasma chemistries (e.g., CHF3 followed by CF4, or BCl3 followed by CF4). Each step targets specific aspects of spacer material removal, allowing precise control over profile development and asymmetry correction without requiring complex single-step processes.
Solution Approach 2:
The patent employs periodic alternation between different plasma chemistries and bias conditions during the etching sequence. This periodic switching enables dynamic adjustment of etch rate and anisotropy, correcting footing and asymmetry issues that would persist in continuous single-mode etching processes.
2Manufacturing precision
If multiple patterning processes such as SADP or SAQP are used, then sub-10 nm node structures can be formed, but the processes are time consuming and reduce throughput
Solution Approach 1:
The patent combines multiple patterning functions into a single integrated spacer etching sequence. By merging profile control, asymmetry correction, and pattern transfer into one cyclic process with alternating chemistries, it achieves SADP/SAQP-level precision without requiring separate processing steps, thereby maintaining high throughput.
Solution Approach 2:
The etching process maintains continuous useful action through cyclic alternation of plasma chemistries without interrupting the overall pattern formation. Each cycle builds upon the previous one, continuously refining the spacer profile and transferring the pattern without requiring intermediate停顿 or additional lithography steps.
3Object-affected harmful factors
If polymer protective layers are used on sidewalls, then sidewall protection from undesirable etching is achieved, but asymmetric profiles and footing are influenced
Solution Approach 1:
The patent converts the potential harm of unprotected sidewalls into a benefit by using the alternating plasma chemistries to provide dynamic protection. The first chemistry (e.g., CHF3) deposits protective fluorocarbon polymers on sidewalls during high-bias steps, while the second chemistry (e.g., CF4) performs clean etching, creating self-regulating sidewall protection that prevents asymmetry without requiring external protective layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves profile control and reduces asymmetries, achieving consistent critical dimensions and shapes, enhancing throughput by forming reliable patterns for sub-10 nm node structures without the need for polymer protective layers.
Implementation Method 1
exposing the spacer material to an inert plasma to modify one or more regions of the spacer material
Implementation Method 2
exposing the modified regions of the spacer material to an etchant plasma to remove a portion of the spacer material
Data Source
AI summary
Embodiments described herein relate to methods for patterning a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment on a spacer material, performing an etching process on a treated region of the spacer material, and repeating the inert plasma treatment and the etching process to form a desired spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as process gas ratios and pressures, may be controlled to influence a desired spacer profile.