Cylindrical MIM Capacitor via TSV Integration
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Solution Overview
Problem
The existing methods for forming metal-insulator-metal (MIM) capacitors in integrated circuits are costly and inefficient, as they require additional process steps and occupy significant area, limiting the density of capacitor networks.
Innovation Solution
The formation of cylindrical MIM capacitors within a substrate using through substrate via (TSV) technology, where the second electrode encloses the first electrode and an insulator, allowing for vertical integration and simultaneous formation with TSV contacts without additional process steps or lithography mask layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MIM capacitors are formed horizontally in interlevel dielectric layers, then capacitor functionality is achieved, but manufacturing cost increases due to additional process steps
Solution Approach 1:
The patent combines capacitor formation with TSV contact formation into a single integrated process. The TSV structure serves dual purposes: as an interconnect pathway and as the capacitor structure itself, eliminating the need for separate capacitor fabrication steps and reducing manufacturing complexity
Solution Approach 2:
The TSV structure is designed to perform multiple functions simultaneously: providing vertical interconnect between layers and forming a functional capacitor. This multi-functionality reduces the overall number of components and process steps required in the manufacturing workflow
2Reliability
If MIM capacitors are formed horizontally in interlevel dielectric layers, then capacitor functionality is achieved, but area consumption increases, preventing high density capacitor network
Solution Approach 1:
The patent transitions from horizontal capacitor formation in the planar direction to vertical capacitor formation using the depth dimension through TSV structures. This dimensional change allows capacitors to be formed in the third dimension, significantly increasing packing density and reducing planar area consumption
Solution Approach 2:
The capacitor structure is nested within the TSV contact structure, with the capacitor electrodes and dielectric material positioned concentrically around the TSV opening. This nesting approach allows the capacitor to occupy the vertical space already allocated for the contact structure, maximizing space utilization
3Reliability
If additional process steps are used to form MIM capacitors, then capacitor functionality is achieved, but manufacturing complexity increases
Solution Approach 1:
The patent merges capacitor formation steps with existing TSV processing steps, including etching, lining, and filling operations. By integrating these functions into a unified process flow, the overall manufacturing complexity is reduced while maintaining capacitor functionality
Data Source
AI summary
Devices and methods for forming a device are disclosed. A substrate is provided. The substrate has first and second major surfaces. A capacitor is disposed in the substrate. The capacitor includes a first electrode, a second electrode and an insulator separating the first and second electrodes. The second electrode encloses the first electrode and the insulator.