D-Mode Amplifier Bias Circuit for Off-State Isolation Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing RF amplifier bias circuits fail to compensate for process variations, leading to unwanted coupling and signal interference due to inconsistent quiescent drain current settings, which affect the operation and accuracy of RF amplifiers.
Innovation Solution
A bias circuit with two control loops is implemented to set quiescent biases for RF amplifiers, ensuring they are in the correct on or off states, thereby increasing insertion loss in the off-state to mitigate unwanted coupling, using existing drain voltage signals and level shifting networks to adjust gate voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed gate voltage is used to set quiescent drain current, then the circuit is simple, but process variations cause inconsistent bias settings leading to unwanted coupling
Solution Approach 1:
The patent implements a feedback mechanism where the actual drain current is sensed and used to adjust the gate voltage dynamically. This closed-loop approach compensates for process variations by continuously monitoring and correcting the bias point, ensuring consistent quiescent drain current settings across different manufacturing processes while maintaining reliable isolation in the off-state.
Solution Approach 2:
The patent dynamically changes the gate voltage parameter based on sensed drain current conditions. By adjusting the gate voltage in response to process variations, the system maintains consistent quiescent drain current settings without requiring a complex fixed-bias circuit design, thus resolving the contradiction between simplicity and reliability.
2Use of energy by moving object
If the amplifier is turned off to reduce power consumption, then energy efficiency improves, but coupling between amplifiers increases due to insufficient isolation
Solution Approach 1:
The patent applies preliminary anti-action by proactively adjusting the gate voltage to a more negative value before the amplifier fully turns off. This preemptive bias adjustment creates sufficient isolation between amplifiers while maintaining low power consumption, preventing coupling issues before they occur rather than reacting to them after the fact.
Solution Approach 2:
The gate voltage serves as an intermediary parameter that mediates between power consumption and isolation requirements. By carefully controlling this intermediate parameter, the system achieves both low power consumption in the off-state and sufficient isolation to prevent coupling, resolving the contradiction between these two objectives.
3Object-affected harmful factors
If the gate voltage is made more negative to improve isolation in off-state, then coupling reduces, but insertion loss in on-state increases
Solution Approach 1:
The patent employs dynamic gate voltage adjustment, transitioning from a fixed negative bias to a dynamically controlled bias that adapts between on and off states. In the off-state, the gate voltage is made sufficiently negative to reduce coupling, while in the on-state, it is adjusted to the optimal value for minimum insertion loss. This dynamic approach resolves the contradiction by allowing different bias conditions for different operational states.
Solution Approach 2:
The gate voltage undergoes periodic adjustment corresponding to the operational cycles of the amplifier. During off-periods, the voltage is set for maximum isolation; during on-periods, it is set for optimal signal transmission. This periodic switching between bias conditions allows the system to achieve both low coupling and low insertion loss at different times in the operational cycle.
Data Source
AI summary
A circuit comprises an amplifier and a bias circuit. The amplifier comprises an output transistor comprising a source electrode, a drain electrode, and a gate electrode. The bias circuit comprises: a first control loop configured to set a first quiescent bias for the output transistor based on a first value of a first control voltage and a second value of a second control voltage, wherein the first quiescent bias is configured to put the output transistor in an on state; and a second control loop configured to set a second quiescent bias for the output transistor based on the first value of the first control voltage and the second value of the second control voltage. The second quiescent bias is configured to put the output transistor in an off state and to increase an insertion loss of the amplifier when the output transistor is in the off state.