D2D Synchronization Timing for Half-Duplex Signal Recovery

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Solution Overview

Problem

In device-to-device (D2D) communication environments, terminals often fail to synchronize due to simultaneous transmission and reception limitations, leading to failed synchronization signals and disrupted communication, especially in out-of-coverage scenarios.

Innovation Solution

An electronic device is equipped with a processor that manages a first timer to transmit and receive synchronization signals at specified timings, adjusts reception attempts based on signal strength, and selects a synchronization reference UE, optimizing synchronization operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If terminals transmit synchronization signals at the same timing in D2D mode, then synchronization efficiency is improved, but communication reliability deteriorates due to half-duplex limitations causing signal reception failures

Engineering Contradiction:
Improvesynchronization efficiencyVSAvoidcommunication reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by having terminals perform clear channel assessment (CCA) before transmitting synchronization signals. Terminals check whether the channel is idle or occupied, and only transmit when the channel is determined to be idle. This preliminary check prevents simultaneous transmissions that would cause half-duplex conflicts, ensuring that synchronization signals can be reliably received while maintaining efficient synchronization throughput.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If terminals repeatedly attempt synchronization in out-of-coverage scenarios, then synchronization success rate is improved, but power consumption increases

Engineering Contradiction:
Improvesynchronization success rateVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements feedback mechanisms where terminals monitor whether synchronization signals are successfully received and whether data packets are valid. Based on this feedback, terminals adjust their synchronization attempt behavior. When synchronization is successful or the channel is busy, terminals reduce or stop transmission attempts, thereby maintaining high synchronization success rates while significantly reducing unnecessary power consumption from repetitive attempts.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies dynamics by making synchronization transmission behavior adaptive rather than static. Terminals dynamically adjust their synchronization attempt frequency and timing based on real-time channel conditions and synchronization status. This dynamic approach allows the system to maintain reliable synchronization while optimizing power consumption by avoiding redundant transmissions when synchronization is already established or channel conditions are unfavorable.

Inventive Principle:
Principle #15Dynamics

3Speed

If terminals monitor channel continuously for synchronization opportunities, then synchronization speed is improved, but device complexity increases

Engineering Contradiction:
Improvesynchronization speedVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies periodic action by having terminals perform clear channel assessment (CCA) at regular, predetermined intervals rather than continuously monitoring the channel. This periodic monitoring approach maintains synchronization speed by frequently checking for opportunities to transmit synchronization signals, while reducing device complexity by eliminating the need for continuous channel monitoring and associated complex control mechanisms.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS12432673B2Electronic device for synchronization in D2D communication environment and method therefor
Publication Date: 2025.09.30 SAMSUNG ELECTRONICS CO LTD
  • US12432673B2 patent drawing
  • US12432673B2 patent drawing
  • US12432673B2 patent drawing

AI summary

An electronic device is provided. The electronic device includes a communication circuit, a memory, and a processor operatively connected to the communication circuit and the memory, wherein the processor may be configured to detect an event for transmission of a synchronization signal in a device-to-device (D2D) mode, start a first timer stored in the memory, transmit a synchronization signal at a specified first timing during a first time period during which the first timer operates, and attempt to receive a synchronization signal at a specified second timing during the first time period, sense that a synchronization signal and a valid data packet have not been received by the time that the first timer expires, and attempt to receive a synchronization signal at a timing corresponding to the designated first timing during the second time period after the first timer has expired.