Split-Capacitor DA Converter Layout for Smaller Circuit Area

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Solution Overview

Problem

Existing DA converter circuits face challenges in miniaturization due to the need for high withstand voltage elements, which complicates the achievement of a smaller circuit area.

Innovation Solution

The proposed DA converter circuit employs a dual configuration with a first DA converter circuit for high-order bits and a second DA converter circuit for low-order bits, utilizing capacitance elements with different insulating layer thicknesses to achieve separate withstand voltages, thereby minimizing circuit area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If elements constituting the DA converter circuit are designed with high withstand voltage to handle high-order bit voltages, then the voltage handling capability is improved, but the circuit area increases making miniaturization difficult

Engineering Contradiction:
Improvewithstand voltage capabilityVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent divides the DA converter circuit into two separate circuits: a first DA converter circuit for high-order bits requiring high withstand voltage, and a second DA converter circuit for low-order bits requiring lower withstand voltage. This segmentation allows each circuit to be optimized independently, with the second circuit using thinner insulating layers and smaller transistors to reduce area while the first circuit maintains the necessary voltage handling capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different insulating layer thicknesses to different parts of the circuit based on their voltage requirements. The first capacitance element uses a first insulating layer with thickness optimized for high voltage, while the second capacitance element uses a second insulating layer with smaller thickness optimized for low voltage. This local differentiation of quality parameters enables area reduction in the low-voltage portion without compromising the high-voltage portion's reliability.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If a single insulating layer thickness is used for all capacitance elements in the DA converter circuit, then the manufacturing process is simplified, but the circuit area cannot be minimized for low-voltage sections

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidcircuit area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent segments the capacitance elements into two groups with different insulating layer specifications. The first capacitance element has a first insulating layer with a first thickness, while the second capacitance element has a second insulating layer with a second thickness that is smaller than the first thickness. This segmentation enables area optimization for the second element without complicating the overall manufacturing process, as both layers can be formed using standard multi-layer deposition techniques.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12254840B2DA converter circuit, electro-optical device, and electronic apparatus
Publication Date: 2025.03.18 SEIKO EPSON CORP
  • US12254840B2 patent drawing
  • US12254840B2 patent drawing
  • US12254840B2 patent drawing

AI summary

A DA converter circuit includes an upper DA converter circuit that includes a first capacitance element including one end coupled to a data line and that outputs a voltage corresponding to five high-order bits to the data line, a lower DA converter circuit that includes a second capacitance element including one end coupled to a relay line and that outputs a voltage corresponding to five low-order bits to the relay line, and a capacitor including one end coupled to the relay line and the other end coupled to the data line. In the first capacitance element, an insulating layer is sandwiched between a first electrode and a second electrode. In the second capacitance element, an insulating layer is sandwiched between a third electrode and a fourth electrode. The insulating layer of the first capacitance element is thicker than the insulating layer of the second capacitance element.