DAC Bias Circuit With Amplifier Feedback for High Linearity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current digital-to-analogue converters face challenges in achieving high linearity due to nonlinearity errors caused by the variation in output impedance with the number of activated elementary source branches, especially for converters beyond 8-10 bits.
Innovation Solution
The proposed solution involves an analogue-to-digital converter circuit with a bias circuit that includes at least one amplifier circuit to increase the output impedance seen by the elementary current source branches, thereby improving linearity. This circuit configuration includes a current mirror and multiple amplifier circuits to regulate the bias and improve the output impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of elementary current source branches is increased to achieve higher resolution conversion, then the conversion precision is improved, but the output impedance variation increases causing greater nonlinearity errors
Solution Approach 1:
The patent introduces a bias circuit as an intermediary component between the current sources and the output. This bias circuit actively compensates for output impedance variations by providing corrective bias currents, thereby maintaining linearity across the full range of activated current source branches without sacrificing conversion precision
Solution Approach 2:
The patent dynamically adjusts bias parameters (current levels and voltages) based on the state of activated current sources. By changing these parameters in real-time, the system compensates for nonlinearity effects that arise when different numbers of current source branches are activated, thus maintaining high linearity for high-resolution conversions
2Manufacturing precision
If amplifier circuits are added to increase output impedance and improve linearity, then the linearity is improved, but the device complexity and surface area increase
Solution Approach 1:
The bias circuit is designed to perform multiple functions simultaneously: it provides biasing for current sources, compensates for output impedance variations, and maintains linearity across different operating conditions. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby limiting the increase in overall device complexity
Solution Approach 2:
The patent integrates the bias circuit functionality within the existing converter architecture rather than adding completely separate external circuits. The bias circuit is nested within the converter structure, sharing common nodes and elements where possible, which minimizes the additional surface area and complexity compared to standalone linearity correction circuits
3Manufacturing precision
If amplifier circuits are added to increase output impedance and improve linearity, then the linearity is improved, but the power consumption increases
Solution Approach 1:
The bias circuit applies partial correction rather than full amplification to compensate for nonlinearity. By using moderate bias currents and voltages rather than full-strength amplification, the circuit achieves sufficient linearity improvement while keeping power consumption增加的幅度有限
Solution Approach 2:
The bias circuit is designed to automatically adjust its operation based on the converter's operating state without requiring external control signals or additional power management circuits. The circuit self-regulates its power consumption based on the actual nonlinearity conditions, avoiding unnecessary power dissipation when full correction is not needed
Data Source
AI summary
An electronic circuit includes an output node adapted to supply an output current through a load circuit; a plurality of elementary source branches connected in parallel; a bias circuit comprising: a current mirror formed by a first bias branch carrying a reference current and a second bias branch; the second bias branch comprises: a follower transistor, a first bias cascode transistor and a second bias current mirror transistor; a first amplifier circuit configured to copy the electrical potential of the output node onto the drain of the first bias cascode transistor; a second amplifier circuit configured to generate a voltage on the gate of the first bias cascode transistor in order to regulate the voltage of its source to a predefined setpoint voltage.