Current-Steering DAC Body Bias Circuit for Low-Frequency Linearity
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Solution Overview
Problem
Current digital-to-analog converters (DACs) in delta sigma modulators face nonlinearity issues at low and medium frequencies, which degrade the performance of integrated circuits, and existing on-chip body bias voltage generation methods consume power and chip area, limiting their effectiveness.
Innovation Solution
A low output impedance biasing circuit is implemented for current-steering DACs, using a biasing transistor with a source, drain, and body, coupled to the transistors of the DAC, and an operational amplifier with a feedback loop to maintain a consistent current and track threshold voltage variations, eliminating the need for digital control and resistive ladders.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If body bias voltage is applied to improve transistor performance and reduce leakage current, then power consumption is reduced, but the body bias voltage must be regulated to prevent excessive current leakage through P-well or N-well
Solution Approach 1:
The patent implements a feedback mechanism where the body bias voltage is dynamically regulated based on the actual leakage current through the P-well or N-well. The circuit monitors the leakage current and adjusts the body bias voltage accordingly to maintain optimal transistor performance while preventing excessive current leakage, thus resolving the contradiction between power reduction and leakage control.
Solution Approach 2:
The patent dynamically changes the body bias voltage parameter based on operating conditions to optimize the trade-off between power consumption and leakage current control. By adjusting the body bias voltage level in response to measured leakage, the system maintains reliable operation while minimizing power loss.
2Reliability
If body bias voltage is generated off-chip, then body biasing can be achieved, but the limited number of input-output pins is consumed
Solution Approach 1:
The patent merges the body bias voltage generation function with existing on-chip circuitry, specifically integrating it with the DAC or modulator circuit. This consolidation eliminates the need for separate off-chip bias voltage sources and reduces the consumption of precious input-output pins, while still providing the necessary body bias functionality for improved transistor performance.
3Power
If NMOS body bias is increased from ground to improve performance, then threshold voltage changes, but leakage current increases significantly when the diode between source and body turns on
Solution Approach 1:
The patent employs dynamic adjustment of the NMOS body bias voltage, transitioning from static biasing to adaptive biasing that responds to operating conditions. The body bias is increased only when and where needed to improve threshold voltage and transistor performance, while the system continuously monitors to prevent the diode between source and body from turning on, thus avoiding significant leakage current increases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the linearity of DACs by reducing body effect and leakage currents, improving power efficiency and chip area utilization without requiring digital calibration or additional components, thereby enhancing the performance of delta sigma modulators.
Implementation Method 1
a biasing transistor having a source, a drain, and a biasing transistor body, the switch transistor body coupled to its source
Implementation Method 2
an operational amplifier with a feedback loop to maintain a consistent current and track threshold voltage variations
Implementation Method 3
a transistor arrangement comprising a first side coupled between a first terminal at a first end of the current loop and a ground terminal at a second end of the current loop
Data Source
Figure 1~4
Figure 2
Figure 3
AI summary
An apparatus includes a digital-to-analog converter (DAC) and an independently controlled biasing circuit coupled to the DAC. The DAC includes at least a first transistor and a second transistor, where the first and second transistors are configured to provide output signals for the DAC. The biasing circuit includes a third transistor having a body coupled to the third transistor source and this source is coupled to a first transistor body and to a second transistor body of the first and second transistors of the DAC. A current loop is coupled to the source and the drain of the transistor of the biasing circuit that maintains a substantially same value of current in the biasing circuit as in the DAC.