DAC Calibration Using Statistical LSB Adjustment

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Solution Overview

Problem

As the number of bits processed by digital-to-analog converters (DACs) increases, the number of circuits required also increases, leading to significant increases in operating time.

Innovation Solution

A digital-to-analog converter (DAC) device with calibration circuitry that generates signals based on least and most significant bits, performs comparisons to generate a calibration signal, and uses statistical operations to adjust bits, reducing operating time while improving accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the number of bits processed by DAC increases, then the processing capability and output resolution are improved, but the number of circuits increases leading to significant increase in operating time

Engineering Contradiction:
Improveoutput resolutionVSAvoidoperating time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the calibration process into two distinct phases: a first calibration phase that calibrates most significant bits (MSBs) using traditional methods, and a second calibration phase that calibrates least significant bits (LSBs) using statistical operations. This segmentation allows the system to handle high-resolution calibration (improving output resolution) while reducing the overall calibration time by applying different strategies to different bit portions, thus resolving the contradiction between processing capability and operating time.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If traditional calibration methods are applied to all bits, then calibration accuracy is maintained, but calibration time increases significantly

Engineering Contradiction:
Improvecalibration accuracyVSAvoidcalibration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies local quality by using different calibration methodologies tailored to different bit significance. MSBs are calibrated using traditional precise methods to ensure overall accuracy, while LSBs are calibrated using faster statistical operations that are sufficient for less significant bits. This localized approach maintains necessary calibration accuracy for critical bits while reducing time spent on less critical bits, resolving the contradiction between calibration accuracy and calibration time.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies partial action by performing statistical operations only on the least significant bits rather than all bits. This partial calibration approach is sufficient because LSBs have less impact on overall calibration accuracy compared to MSBs. By applying calibration effort selectively rather than uniformly, the system achieves adequate calibration accuracy while significantly reducing calibration time.

Inventive Principle:
Principle #16Partial or excessive action

3Loss of time

If statistical operations are used for all bits, then calibration time is reduced, but calibration accuracy deteriorates

Engineering Contradiction:
Improvecalibration timeVSAvoidcalibration accuracy
Core Design Contradiction:
Loss of timeVSMeasurement precision

Solution Approach 1:

The patent applies local quality by using different calibration methodologies tailored to different bit significance. MSBs are calibrated using traditional precise methods to ensure overall accuracy, while LSBs are calibrated using faster statistical operations that are sufficient for less significant bits. This localized approach maintains necessary calibration accuracy for critical bits while reducing time spent on less critical bits, resolving the contradiction between calibration accuracy and calibration time.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20200106452A1Digital to analog converter device and calibration method
Publication Date: 2020.04.02 REALTEK SEMICON CORP
  • US20200106452A1 patent drawing
  • US20200106452A1 patent drawing
  • US20200106452A1 patent drawing

AI summary

A digital-to-analog converter (DAC) device includes a DAC circuitry and a calibration circuitry. The DAC circuitry generates a first signal according to least significant bits of an input signal, and generates a second signal according to most significant bits of the input signal. The calibration circuitry compares the first signal with the second signal to generate a calibration signal, and calibrates the DAC circuitry according to the calibration signal. The calibration signal has bits. The calibration circuitry further repeatedly compares the first signal and the second signal to generate a plurality of comparison results when determining at least one bit of the bits, and performs a statistic operation according to the comparison results, in order to adjust the at least one bit, and a number of the at least one bit is less than a number of the bits.