DAC Calibration Table for Glitch-Free Major Bit Transitions
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Solution Overview
Problem
Current digital analog converters with high resolution suffer from glitch effects and undesired DC errors during major bit transitions, especially when using pulse width modulation or sigma-delta modulation, which are not adequately addressed by existing methods.
Innovation Solution
A digital analog conversion circuit that employs a calibration table to generate series of control values for input values requiring dithering over major bit transitions, allowing non-linear interpolation to compensate for glitches and achieve high monotonicity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pulse width modulation or sigma-delta modulation is used to increase resolution, then resolution is improved, but DC errors and glitch effects are generated during major bit transitions
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing corrected control values in a calibration table before actual operation. The calibration table contains pre-computed compensation values that account for glitch effects and DC errors during major bit transitions. When a major transition is detected, the system retrieves the pre-prepared corrected values from the calibration table, eliminating the need for real-time correction calculations and ensuring monotonicity is maintained from the outset.
Solution Approach 2:
The patent employs parameter changes by modifying the control values based on the transition type. The system detects whether a major bit transition is occurring and dynamically adjusts the control parameters by adding correction values from the calibration table. This parameter modification approach compensates for the inherent DC errors and glitch effects in pulse width modulation and sigma-delta modulation schemes, thereby improving monotonicity while maintaining high resolution.
2Measurement precision
If update frequency is increased to achieve higher resolution through pulse width modulation, then resolution is improved, but the system complexity and cost increase
Solution Approach 1:
The patent introduces an intermediary element - the calibration table - that mediates between the simple 16-bit DAC hardware and the desired 20-bit resolution performance. Instead of directly increasing the DAC resolution or update frequency, the calibration table serves as an intermediate layer that provides software-based compensation. This intermediary approach allows the system to achieve high resolution using existing hardware capabilities while avoiding the complexity and cost of higher-resolution DACs or faster update mechanisms.
Data Source
AI summary
To increase the accuracy and resolution of an m bit digital analog converter, n bit input values with n>m are fed to a control circuit and converted to a series of control values for the digital analog converter using dithering techniques. When the series of control values straddles a major transition where a large number of bits are switched between 1 and 0, a corrected series of control values is retrieved from a calibration table. The corrected series takes into account the glitch effects observed at the output of digital analog converter at a major transition.