DAC Calibration Loop for Static Mismatch Error Correction

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Solution Overview

Problem

Static mismatch errors in local digital-to-analog converters (DACs) due to variations in process, voltage, and temperature affect the accuracy of output signal levels, making it difficult for far-end signal receiving devices to determine signal levels accurately.

Innovation Solution

A calibrating device comprising a digital code generating circuit, a local DAC, an analog-to-digital converter, a filter circuit, an indicating circuit, and a statistical circuit, which generates digital codes, analog signals, gradient values, and selection signals to adjust digital codes based on static mismatch errors, using algorithms like Least Mean Squares to mitigate these errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional DAC design is used without calibration, then device complexity is low, but static mismatch error affects signal level accuracy

Engineering Contradiction:
Improvesignal level accuracyVSAvoidcalibration circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing calibration before normal operation. The calibration process pre-determines correction values for each digital code to compensate for static mismatch errors. The statistical circuit accumulates gradient values during calibration and determines correction values in advance, so that during normal operation, the pre-calibrated digital codes directly compensate for PVT variations without requiring real-time complex calculations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the calibration loop that measures the actual analog signal output via ADC, compares it with the expected value, generates gradient values representing the error, and uses these gradient values to adjust the digital codes. This closed-loop feedback mechanism continuously refines the digital codes to minimize static mismatch errors caused by PVT variations.

Inventive Principle:
Principle #23Feedback

2Manufacturing precision

If calibration is performed for all digital codes, then manufacturing precision improves, but loss of time increases due to extensive calibration process

Engineering Contradiction:
ImproveDAC output accuracyVSAvoidcalibration time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies partial action by selecting only N inconsecutive digital codes for calibration instead of calibrating all possible digital codes. This selective calibration approach focuses on representative codes that capture the PVT variation characteristics, reducing the calibration time while still achieving effective compensation across the full digital code range through interpolation and the statistical circuit's gradient accumulation.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If digital codes are adjusted to compensate for PVT variations, then reliability improves, but device complexity increases due to calibration requirements

Engineering Contradiction:
Improvecircuit system performanceVSAvoidcalibration device complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements self-service by enabling the local circuit to perform its own calibration autonomously. The calibration device includes components within the local circuit that automatically measure PVT-induced errors, generate gradient values, and adjust digital codes without requiring external intervention or complex external calibration equipment. This self-calibrating capability improves reliability while keeping the added complexity contained within the local circuit.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12057856B2Calibrating device for digital-to-analog conversion
Publication Date: 2024.08.06 REALTEK SEMICON CORP
  • US12057856B2 patent drawing
  • US12057856B2 patent drawing

AI summary

A calibrating device can mitigate the static mismatch error of a digital-to-analog converter (DAC), and includes a digital code generating circuit, the DAC, an analog-to-digital converter (ADC), a filter circuit, an indicating circuit, and a statistical circuit. The digital code generating circuit generates a digital code of N digital codes. The DAC generates an analog signal corresponding to one of N signal levels according to the digital code. The ADC generates a digital signal according to the analog signal. The filter circuit generates a gradient value according to the difference between the digital code and the digital signal. The indicating circuit generates a selection signal according to the digital code. The statistical circuit learns from the selection signal that the gradient value is corresponding to a Kth digital code of the N digital codes, and determines whether the Kth digital code should be adjusted according to the gradient value.