Current-Steering DAC Capacitance Compensation for High-Frequency Linearity
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Solution Overview
Problem
Current current steering digital to analog converters face challenges in maintaining linearity due to poor matching of switching impedance at high frequencies, primarily caused by parasitic components and wires, leading to harmonic distortion.
Innovation Solution
The implementation of a digital to analog converter circuit that includes an input circuit and a switched-capacitor circuit, which selectively compensates the capacitance value of nodes based on bit values, and an impedance adjustment circuit to match output impedances, thereby enhancing switching impedance and linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the equivalent impedance of transistors is directly increased to increase the switching impedance of the digital to analog converter, then the switching impedance is improved, but the matching between equivalent impedances deteriorates due to parasitic components and wires at high frequencies
Solution Approach 1:
The patent changes the capacitance parameter by selectively adding compensation capacitances to different nodes based on digital input bits. When a bit is high, compensation capacitance is added to the corresponding node; when low, compensation capacitance is added to the other node. This dynamic parameter adjustment compensates for parasitic effects and improves impedance matching at high frequencies while maintaining high switching impedance.
2Manufacturing precision
If compensation capacitance is added to nodes to improve linearity, then the linearity is improved, but the circuit complexity increases
Solution Approach 1:
The compensation capacitances are integrated into the existing switching architecture of the digital to analog converter. The same switching transistors and control logic that drive the main current switching also control the compensation capacitance switching. This multi-functionality approach improves linearity without requiring separate control circuits, thereby limiting the increase in circuit complexity.
Data Source
AI summary
An analog to digital convertor circuit includes an input circuit and a switched capacitor circuit. The input circuit is configured to selectively drain a first current from a first node or drain a second current from a second node according to a first bit and a second bit that have opposite logic values. The switched capacitor circuit is configured to compensate a capacitance value of one of the first node and the second node according to the first bit and the second bit.