DAC Cell Calibration Using a Single Reference Cell
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Solution Overview
Problem
Existing DACs face challenges in achieving high accuracy and linearity while minimizing power consumption and processor load, as calibrating multiple reference cells can increase size, cost, and power consumption, and calibrating without reference cells may compromise linearity.
Innovation Solution
A method for DAC calibration using a single reference cell, where DAC cells are combined and compared to determine cell error values through multiple calibration tests, forming a solvable system of equations to adjust and tailor individual cell weights, ensuring linearity and accuracy without multiple reference cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple reference cells are used for DAC calibration, then calibration accuracy and linearity are improved, but device size, cost, and power consumption increase
Solution Approach 1:
The patent combines multiple calibration tests into a unified system where a single reference cell is used across multiple different test configurations. By merging the calibration information from multiple tests and using matrix mathematics to solve for individual cell errors simultaneously, the system achieves multi-reference-cell accuracy with only one physical reference cell.
Solution Approach 2:
The single reference cell serves multiple functions by being used in different calibration test configurations. Instead of requiring separate reference cells for different calibration purposes, one reference cell is universally applied across multiple tests, each testing different combinations of DAC cells, thereby reducing the total number of reference cells needed.
2Stability of the object's composition
If multiple reference cells are used for DAC calibration, then linearity is improved, but power consumption increases
Solution Approach 1:
The patent merges multiple calibration tests using a single reference cell to achieve the linearity benefits typically associated with multiple reference cells. The combined data from multiple tests, processed through matrix mathematics, provides sufficient information to determine individual cell errors and ensure DAC linearity without the power overhead of multiple active reference cells.
3Measurement precision
If multiple reference cells are used for DAC calibration, then calibration accuracy is improved, but processor load increases
Solution Approach 1:
The patent performs preliminary organization of calibration data into matrix form before processing. By pre-structuring the calibration outputs and reference outputs into systematic matrices that represent the test configurations, the subsequent mathematical processing becomes more efficient and manageable, reducing the actual computational burden during the calibration execution phase.
4Use of energy by moving object
If a single reference cell is used for DAC calibration, then power consumption is reduced, but calibration accuracy may be compromised
Solution Approach 1:
The patent compensates for using a single reference cell by merging information from multiple calibration tests. Each test provides additional constraints and data points about the DAC cell errors, and combining these through matrix mathematics recovers the full calibration accuracy that would traditionally require multiple reference cells.
Solution Approach 2:
The patent changes the calibration approach from using multiple reference cells in parallel to using a single reference cell across multiple sequential tests. This parameter change in the calibration methodology, combined with mathematical processing of the aggregated test data, maintains calibration accuracy while reducing power consumption.
Data Source
AI summary
A digital-to-analog converter (DAC) calibration system for calibrating N DAC cells in a DAC, where N can be an integer number of DAC cells greater than 2, can include a processor, which can be configured to configure the DAC to generate N reference outputs, configure the DAC to generate N calibration outputs, and determine N overall error values corresponding to a difference between respective individual ones of the N calibration outputs and the N reference outputs. The processor can also be configured to determine, such as using the N overall error values, a cell error value for each of the N DAC cells.