DAC Control Code Mapping for Lower Voltage Error and Noise

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Solution Overview

Problem

Conventional DACs suffer from output voltage errors due to manufacturing processes, leading to increased noise in circuits, especially in small circuit areas.

Innovation Solution

A digital to analog conversion system and method that utilizes a control code conversion circuit to convert N-bit control codes to Y-bit control codes using a control code conversion table, allowing the DAC to output voltages closer to the required values by selecting from a reduced set of DAC output voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional DAC is used with standard control code, then the circuit area can be kept small, but the DAC output voltage error increases leading to greater noise

Engineering Contradiction:
ImproveDAC output voltage accuracyVSAvoidnoise in circuit
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing optimal control code mappings in a conversion table before operation. The system performs calibration during manufacturing to determine the actual output voltages of the DAC, then stores the inverse mapping (desired voltage to actual control code) in a conversion table. During operation, the system simply looks up the conversion table to find the appropriate control code, avoiding real-time complex calculations and directly compensating for DAC errors.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If control code conversion circuit is added to improve DAC output accuracy, then the DAC output voltage error is reduced, but the device complexity increases

Engineering Contradiction:
ImproveDAC output voltage accuracyVSAvoidcircuit structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent uses copying by creating a digital representation (conversion table) of the inverse DAC characteristics. Instead of physically inverting the DAC or adding complex analog compensation circuits, the system creates a lookup table that copies the desired voltage-to-control-code mapping relationship. This digital copy allows the system to compensate for DAC non-linearity using simple digital logic and memory access, avoiding complex analog circuitry.

Inventive Principle:
Principle #26Copying

3Measurement precision

If Y-bit control code is used with Y greater than N, then the DAC output voltage accuracy is improved, but the number of required DAC output voltages increases beyond 2N

Engineering Contradiction:
ImproveDAC output voltage accuracyVSAvoidnumber of DAC output voltages
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies partial action by using only the necessary portion of the Y-bit control code space. The conversion table is designed to map N-bit control codes to Y-bit control codes, but not all 2^Y possible Y-bit codes are necessarily used. The system uses exactly 2^N input control codes and produces 2^N output control codes, selecting only the required subset from the larger Y-bit space. This ensures the DAC outputs exactly 2^N voltages, matching the input control code resolution while achieving accuracy improvement through the conversion process.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20260100721A1Digital to analog conversion system and digital to analog conversion method
Publication Date: 2026.04.09 REALTEK SEMICON CORP
  • US20260100721A1 patent drawing
  • US20260100721A1 patent drawing
  • US20260100721A1 patent drawing

AI summary

A digital to analog conversion system, comprising: a control code conversion circuit, configured to convert a first N-bit control code to a first Y-bit control code according to a control code conversion table, wherein Y is greater than or equal to N; and a DAC, configured to receive the first Y-bit control code and configured to output a first DAC output voltage among a plurality of DAC output voltages, wherein the number of the DAC output voltages is less than or equal to 2N.