Current-Steered DAC Common-Mode Compensation for High Linearity
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Solution Overview
Problem
Conventional digital-to-analog converters (DACs) face challenges in achieving sufficient linearity due to common-mode signal dependencies, which are not fully canceled out in noisy environments and can introduce non-idealities and distortion, especially in high-speed operations.
Innovation Solution
The proposed DAC design adds an extra common-mode signal to both differential outputs, making the common-mode contribution independent of the digital input signal, allowing for easier filtering and improving linearity by ensuring the total common-mode switching activity is predictable and periodic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional DAC design is used, then the circuit structure is simple, but the common-mode signal depends on the digital input signal causing non-idealities and distortion
Solution Approach 1:
The patent segments the common-mode signal generation into two independent parts: the original common-mode signal from the differential current sources and an additional common-mode signal from separate current sources. This segmentation allows the total common-mode signal to be made independent of the digital input signal while maintaining the simplicity of the original DAC structure.
Solution Approach 2:
The patent introduces additional current sources as intermediary elements that generate an extra common-mode signal. This intermediary signal acts as a mediator to cancel or compensate for the input-dependent portion of the original common-mode signal, thereby improving linearity without fundamentally changing the core DAC architecture.
2Reliability
If conventional DAC design is used, then the device is easy to operate, but the common-mode rejection ratio is insufficient in dynamic conditions
Solution Approach 1:
The patent employs periodic switching of the additional current sources synchronized with the sampling clock. This periodic action creates a predictable, periodic common-mode signal that can be easily filtered out by subsequent stages, thereby improving the common-mode rejection ratio in dynamic conditions while maintaining operational simplicity.
Solution Approach 2:
The patent changes the parameters of the common-mode signal by introducing additional current sources that operate independently of the digital input signal. This parameter change makes the total common-mode signal independent of the input data, improving reliability without complicating the operation of the DAC.
3Productivity
If conventional DAC design is used, then the circuit is simple, but distortion increases in high-speed operations
Solution Approach 1:
The patent applies preliminary action by pre-establishing a common-mode signal that is independent of the digital input signal before the actual conversion process. This preliminary common-mode signal compensates for potential distortion in advance, allowing the DAC to operate at high speeds without introducing additional distortion from input-dependent common-mode variations.
Data Source
AI summary
A current-steered DAC has first and second differential outputs for providing an analog output signal under control of a digital input signal. In operational use of the DAC, the output signal has a differential component, which is representative of the digital input signal, and also has a first common-mode component. The DAC has circuitry operative to add an extra common-mode component to both the first and second differential outputs so as to make a sum of the first common-mode component and the extra common-mode component substantially independent of a state change of the digital input signal.


