Current-Steering DAC Common-Mode Current Removal Under PVT Variation

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Solution Overview

Problem

Existing digital-to-analog converters (DACs) face challenges in maintaining low common-mode current variation with changes in process, voltage, and temperature (PVT) without impacting digital signal performance and increasing noise, offset, area, or power consumption.

Innovation Solution

A DAC circuit with a plurality of current-steering cells and a resistor ladder circuit, featuring a first current sink coupled to the shunt branch and a second current sink coupled to the output, designed to remove common-mode current, with the second sink counteracting PVT variations by adjusting its current sinking based on resistance changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If common-mode current removal is implemented in a DAC circuit, then common-mode current variation is reduced, but device complexity and power consumption increase

Engineering Contradiction:
Improvecommon-mode current stabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The common-mode current removal function is segmented into two separate current sinks: a first current sink connected to the shunt branch of the resistor ladder circuit, and a second current sink connected to the DAC output. This segmentation allows each sink to handle a portion of the common-mode current, reducing the complexity burden on any single component while achieving effective common-mode current suppression.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism where the second current sink acts as a compensating element that counteracts PVT variations affecting the first current sink. This intermediary current sink adjusts its current sinking dynamically to maintain overall common-mode current stability, effectively mediating between the varying parameters and the stability requirement.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If common-mode current removal circuitry is added, then noise and offset are reduced, but area and power consumption increase

Engineering Contradiction:
Improvesignal precisionVSAvoidcircuit area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent merges the common-mode current removal function with the existing DAC output structure by integrating the current sinks into the conventional current-steering cell and resistor ladder circuit architecture. This merging approach allows the common-mode current removal functionality to be achieved without adding significant external circuitry, thereby minimizing the increase in circuit area while still reducing noise and offset.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If current sinks are used to remove common-mode current, then common-mode current variation decreases, but power consumption increases

Engineering Contradiction:
Improvecommon-mode current stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies partial action by designing the current sinks to handle only the common-mode current component rather than the full signal current. The first current sink processes a portion of the common-mode current from the shunt branch, while the second current sink handles the remaining portion from the output, achieving effective common-mode suppression with reduced power consumption compared to processing the entire current.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12081233B2Common-mode current removal scheme for digital-to-analog converters
Publication Date: 2024.09.03 QUALCOMM INC
  • US12081233B2 patent drawing
  • US12081233B2 patent drawing
  • US12081233B2 patent drawing

AI summary

Methods and apparatus for common-mode current removal in a digital-to-analog converter (DAC). An example DAC circuit generally includes a plurality of current-steering cells, a resistor ladder circuit coupled to the plurality of current-steering cells, a first current sink coupled between a shunt branch of the resistor ladder circuit and a reference potential node for the DAC circuit, and a second current sink coupled between a first output of the DAC circuit and the reference potential node.