Current Cell Array Layout for DAC Linearity Mismatch Control

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Solution Overview

Problem

Current digital-to-analog converters (DACs) face challenges in maintaining linearity due to mismatch between current sources, which degrades their performance and efficiency.

Innovation Solution

A digital-to-analog converter design that includes a current cell array with current cells arranged in specific patterns, such as diagonal and oblique lines, to ensure that variations in current cells are evenly distributed, minimizing linearity degradation without additional costs like area or power.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If current sources are arranged in conventional patterns, then the DAC structure is simple, but mismatch between current sources deteriorates linearity

Engineering Contradiction:
ImprovelinearityVSAvoidcurrent cell array structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies asymmetry by arranging current cells in oblique patterns rather than conventional symmetric grid arrangements. Specifically, current cells corresponding to different bit weights are positioned along oblique lines with specific slopes, creating an asymmetric layout that distributes mismatch effects uniformly across all current sources, thereby improving linearity without requiring additional cells or complex compensation circuits.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent implements local quality by assigning different spatial positions to current cells based on their bit weight significance. Current cells for higher bit weights are positioned along oblique lines with different slopes compared to lower bit weight cells, creating localized structural variations that optimize the overall linearity performance while maintaining a relatively simple global architecture.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If current cells are arranged to distribute variations evenly, then linearity is improved, but the device structure becomes more complex

Engineering Contradiction:
ImprovelinearityVSAvoidpattern structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent transitions from conventional one-dimensional or two-dimensional grid arrangements to a multi-dimensional oblique coordinate system. By positioning current cells along oblique lines with specific slopes in the spatial arrangement, the patent creates a higher-dimensional structure that uniformly distributes manufacturing variations across all current sources, improving linearity while the regular pattern maintains manageable complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the current cell array into distinct groups corresponding to different bit weights, with each group arranged along specific oblique lines. This segmentation allows each bit weight group to be independently positioned to optimize its contribution to overall linearity, while the segmented structure itself simplifies the control logic by clearly associating specific current cells with specific thermometer code bits.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12003250B2Digital-to-analog converter including current cell array
Publication Date: 2024.06.04 SAMSUNG ELECTRONICS CO LTD
  • US12003250B2 patent drawing
  • US12003250B2 patent drawing
  • US12003250B2 patent drawing

AI summary

A digital-to-analog converter includes a current cell array including a plurality of current cells, each current cell of the plurality of current cells being configured to generate a current of a same magnitude; a first pattern connecting first current cells, among the plurality of current cells, arranged along a diagonal line of the current cell array; a second pattern connecting second current cells, among the plurality of current cells, arranged along a first oblique line parallel to the diagonal line; and a third pattern connecting third current cells, among the plurality of current cells, arranged along a second oblique line parallel to the diagonal line, the third pattern being electrically connected to the second pattern, wherein the diagonal line is between the first oblique line and the second oblique line.