Segmented DAC Subtractive Dither for Deep Back-Off Linearity
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Solution Overview
Problem
Segmented digital-to-analog converters (DACs) face challenges with inter-segment errors due to physical size differences and timing mismatches, leading to non-linear distortion, especially in wideband signal synthesis and deep digital back-off situations, which conventional calibration methods struggle to accurately address without increasing complexity and power dissipation.
Innovation Solution
The implementation of subtractive dither in segmented DACs, where a random dither signal is injected into the input data of higher-order segments and modified in lower-order segments, using overrange DAC cells to compensate for errors in the analog domain, thereby randomizing and reducing inter-segment errors without requiring direct error measurement or complex calibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional calibration methods are used to address inter-segment errors, then manufacturing precision improves, but device complexity and power dissipation increase
Solution Approach 1:
The system uses the DAC's own output signal to generate the dither signal through digital processing, eliminating the need for external calibration equipment or additional hardware components. The dither signal is derived from the DAC output itself, which is then fed back through a digital dither generator to create the randomization signal needed for error correction.
Solution Approach 2:
The invention changes the statistical parameters of the DAC output by introducing random dither signals that modify the amplitude and timing characteristics. This randomization transforms deterministic inter-segment errors into stochastic noise that can be filtered or averaged out, improving effective linearity without requiring physical recalibration of segment weights.
2Manufacturing precision
If conventional calibration methods are used to address inter-segment errors, then manufacturing precision improves, but power dissipation increases
Solution Approach 1:
The system uses the DAC's own output signal to generate the dither signal through digital processing, eliminating the need for external calibration equipment or additional hardware components. The dither signal is derived from the DAC output itself, which is then fed back through a digital dither generator to create the randomization signal needed for error correction.
Solution Approach 2:
The invention replaces physical calibration mechanisms (such as adjustable resistors, switches, or external test equipment) with digital signal processing operations. The dither generation and application are performed entirely in the digital domain using algorithms that randomize the input signal, eliminating the need for power-hungry analog calibration circuits or mechanical adjustment mechanisms.
3Manufacturing precision
If dither signal is added to higher-order segments, then linearity improves, but noise floor increases
Solution Approach 1:
The system employs feedback by taking the DAC output signal and feeding it back through a digital dither generator to create the randomization signal. This feedback mechanism ensures that the dither is correlated with the actual output signal, allowing the randomization to effectively linearize the transfer function while the feedback path enables noise shaping that pushes quantization noise to frequencies where it can be filtered out.
Solution Approach 2:
The dither signal is applied periodically at the sampling rate, creating a regular pattern of randomization that shapes the noise spectrum. By synchronizing the dither application with the sampling clock, the system creates predictable noise characteristics that can be managed through digital signal processing, converting broadband noise into shaped noise that concentrates energy in specific frequency regions.
Data Source
AI summary
A segmented digital-to-analog converter (DAC) includes DAC segments, an overrange DAC, and a dither control circuit. Each DAC segment includes a plurality of DAC cells for generating an analog output signal based on input data to each DAC segment. The overrange DAC generates an analog output signal based on a control signal. The dither control circuit adds a dither to first input data supplied to a higher-order DAC segment, subtract a portion of the dither from second input data supplied to a lower-order DAC segment, and generate the control signal for subtracting a remaining portion of the dither from an output of the segmented DAC in an analog domain. The dither added to the first input data may be one of +1, 0, and −1 and the portion of the dither subtracted from the second input data may be a half of the dither added to the first input data.