Current-Steering DAC Cell Switching With Intermediate Dump State

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Solution Overview

Problem

Current steering digital-to-analog converters (DACs) are prone to nonlinear distortion due to non-ideal error signals generated during code changes, which are not effectively mitigated by standard implementations, leading to switching-related errors.

Innovation Solution

The implementation of additional 'dump' states in DAC cells, allowing for intermediate discharging or pre-charging of internal capacitance before polarity changes, and the use of redundant DAC cells to apply switching techniques that minimize dynamic charge errors by incorporating an intermediate 'dump' state before switching between binary output states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If current cells switch output states directly in response to digital input code changes, then the DAC responds quickly to input changes, but non-ideal error signals are generated during switching transitions causing nonlinear distortion

Engineering Contradiction:
Improveresponse speedVSAvoidconversion accuracy
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by introducing an intermediate 'dump' state that is activated before the actual polarity switching occurs. This dump state pre-charges or pre-discharges internal capacitance, preparing the current cell for the upcoming transition and minimizing the generation of error signals during the switching process, thereby reducing nonlinear distortion while maintaining fast response

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If multiple current cells are used to implement current-steering DAC, then the DAC can provide variable current output, but switch injection errors and asymmetries in ON/OFF transitions generate non-ideal error signals

Engineering Contradiction:
Improvevariable current outputVSAvoidswitching errors
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces an intermediary 'dump' state that acts as a mediator between the ON and OFF states of current cells. This intermediate state provides a controlled transition path that reduces switch injection errors and asymmetries by allowing internal capacitance to be properly charged or discharged before the switching event, thereby minimizing harmful switching errors while preserving variable current output capability

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If the number of current cells switching during transition depends on input code sequence, then the DAC operates flexibly, but nonlinear distortion results from switching-related non-ideal effects

Engineering Contradiction:
Improveinput code flexibilityVSAvoidlinearity
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by activating the dump state before polarity switching based on the input code sequence. This pre-conditioning of internal capacitance through the dump state ensures that switching-related non-ideal effects are minimized regardless of which current cells are switching, thereby maintaining linearity and reducing nonlinear distortion while preserving input code flexibility

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8547268B2Switched current-cell with intermediate state
Publication Date: 2013.10.01 LANTIQ DEUT GBMH
  • US8547268B2 patent drawing
  • US8547268B2 patent drawing
  • US8547268B2 patent drawing

AI summary

Representative implementations of devices and techniques provide digital-to-analog conversion of signals while minimizing switching related errors. Digital to analog converter (DAC) cells may be arranged to include one or more operating states in addition to binary output states, and may employ a switching technique to “dump” the DAC cell between binary outputs. Further, an array of DAC cells may include a partial set of redundant DAC cells for implementation of the switching technique.