DAC Feedback Loop Using Sub-Sampled ADC for DPD Training
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Solution Overview
Problem
Digital-to-analog conversion systems face challenges in mitigating nonlinearity, leading to harmonic and inter-modulation distortions, which introduce interference in adjacent and distant signal channels, particularly in power amplifiers and digital-to-analog converters, necessitating improved Digital Pre-Distortion (DPD) training architectures.
Innovation Solution
A digital-to-analog conversion system utilizing a sub-sampled Analog-to-Digital Converter (ADC) feedback loop with a fixed cutoff frequency filter, allowing for reduced complexity, size, and cost, enables DPD training by generating a digital feedback signal at a lower sample rate, which is used to determine pre-distortion coefficients and model the nonlinearity of the digital-to-analog converter and power amplifier.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a full-rate ADC feedback loop is used for DPD training, then measurement precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent extracts only the essential information needed for DPD training by using a sub-sampled ADC that operates at a reduced rate. Instead of capturing the complete high-rate feedback signal, the system extracts sufficient statistical characteristics and distortion components at a lower sampling rate, thereby reducing feedback path complexity while maintaining adequate measurement precision for DPD coefficient adaptation.
Solution Approach 2:
The patent applies partial action by using a sub-sampled ADC that captures a subset of the full-rate feedback signal. The sub-sampled feedback contains sufficient information for DPD training purposes without requiring the complete high-rate signal, thus reducing device complexity and power consumption while maintaining adequate measurement precision for the specific application of DPD adaptation.
2Device complexity
If a sub-sampled ADC feedback loop is used, then device complexity and power consumption are reduced, but measurement precision deteriorates
Solution Approach 1:
The patent implements a feedback mechanism where the sub-sampled ADC output is used to adapt DPD coefficients through iterative optimization. The feedback loop continuously adjusts the pre-distortion parameters based on the reduced-rate measurements, compensating for the lower measurement precision by using adaptive algorithms that converge to optimal coefficients despite the sub-sampled feedback quality.
3Ease of manufacture
If DPD training is implemented with sub-sampled feedback, then ease of manufacture is improved, but reliability may worsen
Solution Approach 1:
The patent changes the sampling rate parameter of the ADC in the feedback path, operating it at a reduced rate compared to the main signal path. This parameter change simplifies the feedback path hardware and reduces power consumption while maintaining adequate performance for DPD training through adaptive coefficient adjustment.
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AI summary
A digital-to-analog conversion system is provided. The digital-to-analog conversion system includes a digital-to-analog converter configured to receive a pre-distorted digital signal from a digital circuit, and to generate an analog signal based on the pre-distorted digital signal. Further, the digital-to-analog conversion system includes a feedback loop for providing a digital feedback signal to the digital circuit. The feedback loop includes an analog-to-digital converter configured to generate the digital feedback signal based on the analog signal, and wherein a sample rate of the analog-to-digital converter is lower than a sample rate of the digital-to-analog converter.