On-Chip DAC Calibration with Half-Step Resolution
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Solution Overview
Problem
Current calibration techniques for integrated circuits are time-consuming and costly due to significant chip-to-chip variations in reference parameters, particularly at advanced technology nodes, requiring efficient methods to adjust reference voltages without increasing calibration time.
Innovation Solution
An on-chip calibration circuit employing a binary search calibration process and post-calibration processing to achieve additional resolution by adjusting the analog parameter by a half DAC step, using a digital-to-analog converter (DAC) with a comparator and control circuit in a feedback loop, allowing for improved calibration resolution without extending calibration time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If self-calibration circuits are used to reduce calibration time, then calibration speed is improved, but calibration resolution deteriorates
Solution Approach 1:
The calibration process is segmented into two distinct phases: a fast binary search calibration phase that achieves coarse alignment, and a subsequent refinement phase that adds half-LSB resolution. This segmentation allows each phase to be optimized independently - the binary search phase minimizes time while the refinement phase enhances resolution without significantly increasing overall calibration time.
Solution Approach 2:
The binary search calibration is performed as a preliminary action to quickly bring the reference parameter close to the target value. This preliminary calibration establishes a starting point that is sufficiently accurate, allowing the subsequent half-LSB refinement to achieve high precision without requiring the entire calibration process to be slow and iterative.
2Measurement precision
If higher calibration resolution is achieved, then measurement precision is improved, but calibration time increases
Solution Approach 1:
The invention changes the calibration parameter approach by introducing a half-LSB adjustment mechanism. Instead of using full LSB steps that require extensive iterative searching, the system utilizes half-LSB steps that can be applied directly after binary search calibration. This parameter change enables high resolution calibration with minimal additional time because the half-LSB refinement requires far fewer iterations than achieving the same resolution through full LSB binary search alone.
Data Source
AI summary
Disclosed is a calibration circuit and method. The circuit includes: a DAC that outputs an analog parameter and includes output parameter adjustment circuitry; a comparator that receives a reference parameter and the analog parameter; and a control circuit (with select logic) connected to the comparator and DAC in a feedback loop. During a calibration mode, the magnitude of the analog parameter is adjusted by ½ DAC step in one direction and the feedback loop is used to perform a binary search calibration process. During an operation mode, the magnitude of the analog parameter is adjusted by ½ DAC step in the opposite direction. The select logic selects the DAC step identified by the calibration process or the next higher DAC step as a final DAC step. The control circuit outputs a final DAC code corresponding to the final DAC step and the DAC generates a calibrated parameter based thereon.


