DAC Serial Interface for Non-Volatile Memory Power-Up Settings
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Solution Overview
Problem
Digital-to-analog converter (DAC) devices lose configuration and address information when power is removed, requiring reprogramming upon power-up, which increases initialization and calibration steps and reduces system efficiency.
Innovation Solution
Incorporating non-volatile memory, such as EEPROM or FLASH, into DAC devices to store configuration and address information, along with effective interface communication protocols that allow the master controller unit to access both volatile and non-volatile memories using standard serial interfaces like I2C, SPI, or USB, ensuring data persistence and efficient initialization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If volatile memory is used to store configuration and address information in DAC devices, then the device can operate with simple and fast memory access, but the configuration and address information are lost when power is removed, requiring reprogramming upon power-up
Solution Approach 1:
The patent applies preliminary action by pre-storing configuration and address information in non-volatile memory before power is removed. When power is restored, the DAC device automatically retrieves this pre-stored information without requiring external reprogramming, thus eliminating the time loss associated with reinitialization.
Solution Approach 2:
The patent introduces non-volatile memory as an intermediary between the power supply and the DAC register. This intermediary component maintains configuration and address information independently of power state, allowing the master controller to retrieve pre-stored data rather than reprogramming from scratch, thereby reducing initialization time.
2Reliability
If non-volatile memory is incorporated into DAC devices to store configuration and address information, then data persistence during power interruptions is achieved, but the device complexity increases
Solution Approach 1:
The patent merges volatile and non-volatile memory into a single integrated memory subsystem within the DAC device. This unified memory architecture allows configuration and address information to be stored persistently in non-volatile memory while maintaining fast access through volatile memory, achieving data persistence without proportionally increasing device complexity.
Solution Approach 2:
The patent makes the memory subsystem multi-functional by enabling it to operate in both volatile and non-volatile modes. The same memory infrastructure serves dual purposes: maintaining data persistence across power cycles and providing fast access during operation, thereby achieving reliability enhancement without adding separate dedicated components for each function.
3Ease of manufacture
If DAC devices have fixed addresses mask programmed during fabrication, then manufacturing is simplified, but up to eight different integrated circuit fabrication masks are required for three bit address, increasing manufacturing time and costs
Solution Approach 1:
The patent applies preliminary action by pre-storing address information in non-volatile memory during fabrication. This allows a single fabrication mask to be used for all devices, while the actual address values are programmed into non-volatile memory after fabrication, eliminating the need for multiple address-specific masks and reducing manufacturing complexity.
Solution Approach 2:
The patent uses copying by storing address information in non-volatile memory rather than hard-wiring it through multiple fabrication masks. A single master mask design can produce all devices, and the specific address values are copied into non-volatile memory through programming, replacing the need for physical mask variations with digital data storage.
4Speed
If the DAC register must be reprogrammed each time the DAC device is powered up, then the volatile memory can be kept simple and fast, but additional program cycles of master controller program are required, reducing system efficiency
Solution Approach 1:
The patent applies preliminary action by pre-loading configuration and address information into non-volatile memory before power is removed. Upon power-up, this information is automatically available in the DAC register without requiring additional program cycles from the master controller, thus maintaining fast memory access while improving system initialization efficiency.
Solution Approach 2:
The patent enables the DAC device to serve itself by automatically retrieving configuration and address information from non-volatile memory upon power-up without requiring external intervention from the master controller. This self-service capability eliminates the need for additional program cycles, maintaining simple and fast volatile memory access while improving overall system productivity.
Data Source
AI summary
A mixed signal integrated circuit device, e.g., digital-to-analog converter (DAC), has a serial interface communication protocol that accesses volatile and/or non-volatile memory and allows a preprogrammed output voltage whenever the mixed signal device is powered-up. However, unlike conventional DACs, DACs with non-volatile memory may need special interface communication protocols for effective operation of the DAC and communications between a system master controller unit (MCU). Interface communications protocols that do not violate standard serial bus communications protocols are provided for communicating between the volatile and non-volatile memories of the DAC so that the MCU may access the DAC's memories (non-volatile and/or volatile memories). The mixed signal integrated circuit device has a user programmable address.