DAC Isolation Circuit for Current Source Glitch Suppression
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Solution Overview
Problem
In segmented digital-to-analog converter (DAC) arrays used in line drivers like 10/100BT Ethernet, glitches caused by parasitic gate-to-drain capacitance result in significant overshoots and amplitude modulation beyond specification limits due to the shared current source signal among DAC segments.
Innovation Solution
An isolation circuit is introduced to selectively provide and isolate the source bias signal to each current source device based on the state of digital input bits, using a switch and logic gate to control the flow of the source bias signal, thereby preventing noise propagation and reducing the need for large capacitance bypass capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If DAC segments are switched off to generate output waveform, then the DAC can operate at high speed (500 MHz), but glitches result on the current source input signal due to parasitic gate-to-drain capacitance
Solution Approach 1:
An isolation circuit is introduced as an intermediary component between the digital input bit and the current source device. This isolation circuit includes a switch that is controlled by the digital input bit to selectively connect or disconnect the current source device from the shared current source signal line, thereby preventing glitches generated by one DAC segment from affecting other segments
Solution Approach 2:
The patent divides the segmented DAC array into electrically isolated segments using individual isolation circuits for each DAC segment. Each segment's current source device is independently controlled by its own switch, creating electrical separation that prevents noise propagation while maintaining the segmented architecture's high-speed operation capability
2Device complexity
If the current source signal is shared among all DAC segments, then the circuit complexity is reduced, but glitches from one segment are received at all other segments causing overshoots and amplitude modulation
Solution Approach 1:
The patent introduces individual isolation circuits for each DAC segment, creating electrical separation between segments that share the same current source signal line. Each segment's current source device is independently controlled by a switch, preventing noise propagation while maintaining the benefits of a shared signal architecture
Solution Approach 2:
Switches controlled by digital input bits serve as intermediary components between the shared current source signal line and individual current source devices. These intermediaries enable selective connection/disconnection to prevent glitch propagation while maintaining circuit simplicity through shared bias signaling
3Object-generated harmful factors
If bypass capacitors are used to reduce glitches, then noise filtering is improved, but large capacitance values are required which increase device area and complexity
Solution Approach 1:
The isolation circuit with a controlled switch acts as an intermediary that prevents glitch propagation at the source, eliminating the need for large bypass capacitors. This approach provides noise filtering through active isolation rather than passive capacitance, significantly reducing the required capacitor area
Solution Approach 2:
The isolation circuit proactively prevents glitch generation by isolating the current source device before the glitch can propagate to other segments. This preliminary action eliminates the need for reactive noise filtering using large bypass capacitors, reducing both area and complexity
Data Source
AI summary
An electronic circuit comprises a digital-to-analog converter (DAC) core circuit having a current source device and a digital input bit. An isolation circuit is also provided and is connected to the DAC core circuit. The isolation circuit is configured to selectively provide a source bias signal to the current source device. The isolation circuit also is configured to isolate the source bias signal from the current source device based on a state of the digital input bit.