DAC Linearity Correction Using Integrated Current Error Measurement
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Solution Overview
Problem
Correcting non-linearity in Digital-to-Analog Converters (DACs) is challenging due to the complexity and inefficiency of traditional methods that require multiple measurement circuits for p-type and n-type current sources, leading to large errors and increased area and power consumption.
Innovation Solution
A DAC apparatus with a single adjustable current source and measurement logic that monitors and adjusts the integrated error of both p-type and n-type current sources, reducing the need for multiple measurement circuits and improving linearity by correcting odd and even order harmonics using a dumping algorithm.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional multiple measurement circuits are used to correct non-linearity of p-type and n-type current sources separately, then measurement precision may be maintained, but device complexity and area increase significantly
Solution Approach 1:
The patent combines the correction of p-type and n-type current sources into a single integrated measurement circuit that processes both current sources simultaneously. Instead of using separate measurement circuits for each current source type, the invention merges the measurement and correction functions into one unified circuit, reducing device complexity while maintaining linearity correction precision.
Solution Approach 2:
The measurement circuit is designed with universal functionality to handle both p-type and n-type current sources through a single interface. The circuit can selectively measure and correct different current source types using the same hardware infrastructure, eliminating the need for dedicated measurement circuits for each current source type.
2Manufacturing precision
If traditional multiple measurement circuits are used for separate correction of current sources, then comprehensive error correction may be achieved, but area consumption increases
Solution Approach 1:
The patent merges multiple correction functions into a single integrated circuit block that occupies less area than multiple separate circuits would require. The unified measurement circuit consolidates the correction logic for both p-type and n-type current sources, achieving comprehensive linearity accuracy while minimizing the silicon area consumed.
Solution Approach 2:
The measurement circuit employs universal correction mechanisms that can address errors in both current source types through shared hardware resources. This multi-functional approach allows the same circuit area to serve multiple correction purposes, reducing the total area required compared to dedicated circuits for each function.
3Manufacturing precision
If traditional multiple measurement circuits are used for current source correction, then thorough linearity correction may be achieved, but power consumption increases
Solution Approach 1:
The patent combines the power-consuming measurement and correction operations for p-type and n-type current sources into a single integrated circuit that operates simultaneously. This merging eliminates redundant power consumption that would occur if separate circuits operated independently, while maintaining thorough non-linearity correction accuracy.
Solution Approach 2:
The measurement circuit uses universal correction algorithms and shared hardware resources to correct errors in both current source types with a single power supply chain. This approach reduces the total power consumption compared to having separate powered circuits for each current source, while achieving comprehensive linearity correction.
Data Source
AI summary
Described is an apparatus which comprises: a digital-to-analog converter (DAC) having a DAC cell with p-type and n-type current sources and an adjustable strength current source which is operable to correct non-linearity of the DAC cell caused by both the p-type and n-type current sources; and measurement logic, coupled to the DAC, having a reference DAC cell with p-type and n-type current sources, wherein the measurement logic is to monitor an integrated error contributed by both the p-type and n-type current sources of the DAC cell, and wherein the measurement logic is to adjust the strength of the adjustable strength current source according to the integrated error and currents of the p-type and n-type current sources of the reference DAC cell.