DAC Element Selection Circuit for Mismatch Error Averaging
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Solution Overview
Problem
Existing digital-to-analog converters (DACs) face performance limitations due to mismatches in circuit elements, which affect specifications like total harmonic distortion and signal-to-noise ratio, necessitating techniques to dynamically select circuit elements to mitigate these issues.
Innovation Solution
The implementation of a system comprising first, second, and third circuits, where the first circuit performs thermometer decoding and the second circuit, aided by a control circuit, dynamically selects circuit elements through multiplexers to generate analog output signals, employing data weighted averaging and dynamic element matching to minimize mismatches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If binary weighted circuit elements are used in DAC, then the number of circuit elements is reduced, but the manufacturing precision deteriorates due to difficulty in accurately matching elements of vastly different sizes
Solution Approach 1:
The patent segments the DAC into multiple sub-DACs, each with fewer circuit elements that are easier to match. By dividing the overall conversion task across multiple smaller units, the manufacturing precision requirement for individual elements is relaxed while maintaining overall system performance.
Solution Approach 2:
The patent employs dynamic element matching techniques where the selection and weighting of circuit elements changes over time based on input conditions. This dynamic approach allows the system to compensate for manufacturing variations by adaptively selecting better-matched elements during operation.
2Ease of operation
If circuit elements are statically selected based on input data, then the circuit operation is simple, but performance deteriorates due to unmitigated mismatches affecting THD and SNR
Solution Approach 1:
The patent transitions from static to dynamic circuit element selection. The system continuously monitors and adapts its element selection based on real-time conditions, enabling it to mitigate mismatch effects dynamically. This improves reliability by ensuring performance specifications are met while adding controlled complexity to the operation.
Solution Approach 2:
The patent implements feedback mechanisms where output characteristics are monitored and used to adjust circuit element selection. This closed-loop approach allows the system to compensate for mismatches by selecting elements that optimize performance metrics like THD and SNR based on actual operating conditions.
3Manufacturing precision
If 2N-1 equal-sized circuit elements are used in DAC, then the manufacturing precision improves, but the device complexity increases
Solution Approach 1:
The patent segments the large set of 2N-1 equal-sized elements into smaller groups or sub-DACs. This segmentation reduces the effective complexity by organizing elements into manageable units while preserving the manufacturing precision advantage of using equal-sized elements.
Solution Approach 2:
The patent combines multiple sub-DACs with fewer elements each to achieve the overall N-bit conversion function. By merging the outputs of multiple simpler units, the system achieves the desired precision without requiring all 2N-1 elements to be simultaneously active, thus reducing effective complexity.
Data Source
AI summary
Techniques for dynamically selecting circuit elements to combat mismatches are described. In one design, an apparatus includes first, second, and third circuits. The first circuit receives input data and provides first signals that are asserted based on the input data, e.g., with thermometer decoding. The second circuit receives the first signals and provides second signals used to select circuit elements, e.g., current sources, capacitors, resistors, etc. The third circuit generates a control for the second circuit, and the second circuit maps the first signals to the second signals based on this control. In one design, the second circuit includes a set of multiplexers and a control circuit. The multiplexers provides the first signals, circularly rotated by an amount determined by the control, as the second signals. The control circuit accumulates control data (e.g., the input data, pseudo-random data, or a fixed value) with the current control value to obtain new control value.