Super-Resolution DAC Using Redundant Sensing and Mismatch Errors

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Solution Overview

Problem

Existing digital-to-analog converters (DACs) face limitations in achieving high resolution due to resource constraints such as size, power consumption, and mismatch errors during fabrication, which restrict their application in various fields that require high precision.

Innovation Solution

The implementation of a redundant sensing (RS) technique that utilizes a non-orthogonal grouping method to enhance the effective resolution beyond conventional limits by exploiting mismatch errors, allowing for a uniform distribution of references across the sample space, thereby achieving super-resolution without the need for post-processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional DAC design is used to achieve higher resolution, then measurement precision is improved, but device complexity and power consumption increase significantly

Engineering Contradiction:
ImproveDAC resolutionVSAvoidchip area
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent converts the harmful mismatch error, which traditionally degrades DAC precision, into a beneficial resource for achieving super-resolution. By intentionally introducing random mismatch through dithering and exploiting the statistical properties of these errors through redundant sensing and optimization algorithms, the system achieves effective resolution beyond the intrinsic hardware limits without increasing physical component precision or chip area

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent changes the operational parameters of the DAC by introducing dithering signals and using optimization algorithms that dynamically adjust the interpretation of quantization levels. This allows the system to extract sub-LSB information from the quantization process itself, achieving super-resolution through parameter optimization rather than through increased hardware precision

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If conventional DAC design is used to achieve higher resolution, then measurement precision is improved, but power consumption increases

Engineering Contradiction:
ImproveDAC resolutionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent converts the harmful mismatch error into a beneficial resource for achieving super-resolution. By intentionally introducing random mismatch through dithering and exploiting the statistical properties of these errors through redundant sensing and optimization algorithms, the system achieves effective resolution beyond the intrinsic hardware limits without increasing power consumption

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The system uses the inherent mismatch errors present in the DAC components themselves as the source of additional resolution information. Rather than requiring additional precision components that would consume more power, the system serves itself by extracting useful information from the unavoidable manufacturing variations already present in the circuit

Inventive Principle:
Principle #25Self-service

3Measurement precision

If redundant sensing with non-orthogonal grouping is implemented, then effective resolution is enhanced beyond intrinsic limits, but device complexity increases

Engineering Contradiction:
Improveeffective resolutionVSAvoidprocessing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent performs preliminary optimization during the calibration phase, where the non-orthogonal grouping matrices are pre-computed and stored. This preliminary action allows the system to achieve super-resolution during normal operation by simply applying pre-computed transformation matrices to the redundant measurements, rather than performing complex optimization in real-time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent transitions from the intrinsic measurement space to an expanded redundant measurement space by introducing non-orthogonal grouping. This dimensional expansion allows the system to capture additional information about the input signal that would be lost in conventional orthogonal measurements, enabling super-resolution through mathematical transformation rather than through increased physical measurement precision

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Measurement precision

If mismatch error is exploited for super-resolution, then measurement precision is improved, but manufacturing precision requirements become more stringent

Engineering Contradiction:
Improveeffective resolutionVSAvoidcomponent matching
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The patent converts the harmful mismatch error into a beneficial resource. By intentionally introducing random mismatch through dithering and exploiting the statistical properties of these errors through redundant sensing and optimization algorithms, the system achieves super-resolution without requiring higher manufacturing precision. The approach actually benefits from the presence of mismatch errors rather than requiring their elimination

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS11424755B2System and method for a super-resolution digital-to-analog converter based on redundant sensing
Publication Date: 2022.08.23 REGENTS OF THE UNIVERSITY OF MINNESOTA
  • US11424755B2 patent drawing
  • US11424755B2 patent drawing
  • US11424755B2 patent drawing

AI summary

A digital-to-analog converter device including a set of components, each component included in the set of components including a number of unit cells, each unit cell being associated with a unit cell size indicating manufacturing specifications of the unit cell is provided by the present disclosure. The digital-to-analog converter device further includes a plurality of switches, each switch included in the plurality of switches being coupled to a component included in the set of components, and an output electrode coupled to the plurality of switches. The digital-to-analog converter device is configured to output an output signal at the output electrode. A first unit cell size associated with a first unit cell included in the set of components is different than a second unit cell size associated with a second unit cell included in the set of components.