Pseudo Tri-Level DAC Cell Switching for Mismatch Suppression
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Solution Overview
Problem
Conventional tri-level digital-to-analog converters (DACs) suffer from non-linear distortion due to static mismatch between reference circuits and total harmonic distortion (THD) degradation, especially when common-mode feedback (CMFB) circuits are connected or not connected to transimpedance amplifiers.
Innovation Solution
A multi-level DAC element with a switch circuit that controls the interconnection between reference circuits and an output port, employing a pseudo tri-level design where at least one reference circuit is coupled to the output during the '0' state, and using a doubled sampling frequency to divide the operation period into phases for mismatch suppression.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a conventional tri-level DAC element is used without CMFB circuit, then area efficiency is improved, but non-linear distortion increases due to static mismatch between reference circuits
Solution Approach 1:
The patent applies periodic action by using a doubled sampling frequency to alternately couple the first and second reference circuits to the output during the '0' state. This periodic switching occurs over two phases within each sampling period, allowing the system to average out static mismatch effects between the P-channel and N-channel reference circuits, thereby improving linearity without requiring additional CMFB circuitry.
Solution Approach 2:
The patent changes the operational parameters by operating at a doubled sampling frequency compared to the data rate. This parameter change enables the reference circuits to be alternately coupled to the output in a time-division manner, transforming the static mismatch problem into a dynamic averaging process that suppresses distortion while maintaining area efficiency.
2Manufacturing precision
If a CMFB circuit is connected to transimpedance amplifier, then non-linear distortion is reduced, but total harmonic distortion degrades due to drain voltage modulation
Solution Approach 1:
The patent uses periodic action with doubled sampling frequency to alternately connect the reference circuits to the output during the '0' state. This periodic switching averages out the static mismatch between reference circuits, achieving linearity improvement without requiring CMFB circuitry, thereby avoiding the drain voltage modulation that causes THD degradation.
Solution Approach 2:
The patent extracts the CMFB circuit from the system entirely, replacing it with the periodic reference circuit coupling approach. By removing the CMFB circuit and using temporal averaging instead, the invention achieves linearity improvement without introducing the harmful drain voltage modulation effects that degrade THD.
3Object-generated harmful factors
If reference circuits are disconnected during '0' state, then noise is reduced, but mismatch between reference circuits causes non-linear distortion
Solution Approach 1:
The patent applies periodic action by alternately coupling the reference circuits to the output during the '0' state using doubled sampling frequency. This periodic switching maintains continuous connection of reference circuits to the output, preventing mismatch-induced distortion while the alternating nature helps average out noise contributions from each reference circuit.
Data Source
AI summary
A multi-level digital-to-analog converter (DAC) element includes a first DAC cell. The first DAC cell includes a first reference circuit, a second reference circuit, and a switch circuit. The first reference circuit provides a first reference signal. The second reference circuit provides a second reference signal. The first switch circuit receives a control input from an input port of the multi-level DAC element, and controls interconnection between the first reference circuit, the second reference circuit, and an output port of the multi-level DAC element according to the control input. During a period in which the multi-level DAC element operates in a “O” state, the first switch circuit is arranged to couple at least one of the first reference circuit and the second reference circuit to the output port of the multi-level DAC element.