Segmented DAC Calibration and MSB Randomization for Linearity
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Solution Overview
Problem
Digital to analog converters (DACs) face challenges in achieving high linearity due to process variations and non-ideal characteristics, making it difficult to meet current speed and resolution requirements.
Innovation Solution
A DAC device incorporating both calibration and randomization mechanisms, where the calibration circuitry adjusts the DAC circuit based on comparisons of signals generated by least significant and most significant bits, and the randomization circuitry processes only the most significant bits to improve linearity across low and high frequency bands, reducing circuit area and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If calibration mechanism is applied to improve linearity, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The input signal bits are segmented into most significant bits (MSBs) and least significant bits (LSBs), which are processed by separate DAC circuits. The calibration mechanism is applied selectively to the MSB path, reducing the overall calibration complexity while maintaining linearity performance.
Solution Approach 2:
Instead of applying calibration to all input bits, the patent applies calibration only to the MSB path. This partial action approach reduces the calibration complexity and circuit overhead while still achieving the required linearity performance for the overall DAC system.
2Manufacturing precision
If randomization mechanism is applied to improve linearity, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The randomization mechanism is applied only to the MSB path, segmenting the randomization function from the LSB path. This selective application reduces the overall circuit complexity while maintaining linearity improvement in the critical MSB region.
Solution Approach 2:
Randomization is applied partially only to MSBs rather than all input bits. This partial randomization achieves sufficient linearity improvement for high-frequency performance while reducing the complexity overhead of full-signal randomization.
3Manufacturing precision
If full bit randomization is applied, then linearity is improved, but processing speed decreases
Solution Approach 1:
The signal processing path is segmented into MSB and LSB channels with different processing treatments. The MSB path includes randomization for linearity improvement, while the LSB path maintains direct processing for speed, achieving a balance between linearity and processing speed.
Solution Approach 2:
Randomization is applied partially only to MSBs rather than all bits. Since MSBs contribute more significantly to overall signal accuracy, this partial application achieves adequate linearity improvement without the full speed penalty of complete signal randomization.
4Manufacturing precision
If calibration and randomization are applied to all bits, then linearity is improved, but circuit area increases
Solution Approach 1:
The DAC circuit is segmented into MSB and LSB processing paths, with calibration and randomization mechanisms applied only to the MSB path. This segmentation reduces the overall circuit area required for calibration and randomization functionality while maintaining essential linearity performance.
Solution Approach 2:
Calibration and randomization are applied partially only to MSBs rather than all input bits. This partial application reduces the circuit area overhead for calibration counters, randomization logic, and associated infrastructure while still achieving sufficient linearity improvement for high-precision DAC operation.
Data Source
AI summary
A digital-to-analog converter (DAC) device includes a DAC circuitry, a calibration circuitry, and a randomization circuitry. The DAC circuitry includes a first DAC circuit and a second DAC circuit. The first DAC circuit is configured to generate a first signal according to least significant bits of an input signal. The second DAC circuit is configured to output a second signal. The calibration circuitry is configured to compare the first signal with the second signal, in order to calibrate the second DAC circuit. The randomization circuitry is configured to randomize most significant bits of the input signal, in order to generate first control signals, in which the second DAC circuit is further configured to generate the second signal according to the most significant bits or the first control signals.