DAC Amplitude-Driven NCO Reset for At-Speed Waveform Synchronization

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Solution Overview

Problem

Existing digital-to-analog converters face challenges in achieving precise, real-time control of waveform characteristics due to limitations in numerically controlled oscillators (NCOs), leading to mistiming and frequency restrictions, and existing solutions introduce discontinuities or increase complexity.

Innovation Solution

Implementing amplitude-driven control by detecting defined subsequences in the digital amplitude indicator sequence to conditionally reset the NCO, allowing synchronization without interrupting the amplitude stream and avoiding frequency limitations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional NCO control methods are used, then the converter can operate continuously, but mistiming and frequency restrictions occur

Engineering Contradiction:
Improvewaveform timing accuracyVSAvoidfrequency range
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system monitors the digital amplitude indicator sequence for specific patterns and uses this feedback to trigger NCO resets, creating a closed-loop control mechanism that maintains timing accuracy while adapting to waveform requirements

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The NCO reset mechanism transitions from static (fixed frequency) to dynamic (conditionally reset based on amplitude patterns), allowing the system to adapt frequency and phase in real-time while maintaining continuous operation

Inventive Principle:
Principle #15Dynamics

2Reliability

If NCO reset is implemented to improve synchronization, then timing accuracy improves, but discontinuities are introduced in the amplitude stream

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidamplitude stream continuity
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The digital amplitude indicator sequence serves as an intermediary that carries both amplitude information and reset trigger information, allowing the NCO to be reset without interrupting the amplitude data stream

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The control signal is segmented into the amplitude indicator sequence, where specific patterns within the sequence trigger NCO resets without requiring separate control channels or interrupting the main amplitude stream

Inventive Principle:
Principle #1Segmentation

3Measurement precision

If dedicated reset control signals are used, then NCO control is precise, but device complexity increases

Engineering Contradiction:
ImproveNCO control precisionVSAvoidcontrol signal structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The digital amplitude indicator sequence performs dual functions: conveying amplitude information to the DAC and containing embedded patterns that trigger NCO resets, eliminating the need for separate control signals

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The control functionality is merged into the existing amplitude indicator sequence, combining amplitude control and NCO reset control into a single signal path without requiring additional hardware or signal lines

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250379590A1Amplitude-driven at-speed control of digital-to-analog converters
Publication Date: 2025.12.11 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20250379590A1 patent drawing
  • US20250379590A1 patent drawing
  • US20250379590A1 patent drawing

AI summary

Systems and techniques that facilitate amplitude-driven at-speed control of digital-to-analog converters are provided. In various embodiments, a system can comprise a digital-to-analog converter that is configured to generate an analog waveform based on a digital amplitude indicator sequence. In various aspects, the system can comprise a processor that is configured to reset an operating characteristic of the digital-to-analog converter in response to detection of a defined digital amplitude indicator subsequence in the digital amplitude indicator sequence. In various instances, the operating characteristic can be operation of a numerically controlled oscillator of the digital-to-analog converter.