DAC Offset Calibration Using Polarity-Swapped ADC Measurement

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Solution Overview

Problem

Existing digital-to-analog converter (DAC) calibration methods either affect the input signal range or allow DC offset from analog-to-digital converters (ADC) to interfere with DAC calibration, leading to suboptimal signal quality due to non-ideal effects.

Innovation Solution

A calibration method and circuit for DAC that generates specific digital input signals, swaps polarity of analog signals, and uses ADC to produce output signals for determining DC offset polarity, allowing for accurate calibration without affecting the input signal range and isolating ADC-induced offsets.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a two-point interpolation method is used to compensate the DC offset of the DAC, then the DC offset can be compensated, but the input signal range of the DAC is affected

Engineering Contradiction:
ImproveDC offset compensation accuracyVSAvoidinput signal range
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent introduces an intermediary calibration circuit that includes a controllable switch and a reference voltage source. This intermediary component allows DC offset calibration without directly affecting the DAC's input signal path. The switch selectively connects the reference voltage to the DAC output during calibration mode, enabling offset compensation while preserving the normal input signal range during operation mode.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If an analog-type DC offset calibration method is used, then DC offset can be calibrated, but DC offset of ADC appears at DAC output after calibration and dominates the offset error

Engineering Contradiction:
ImproveDC offset calibration accuracyVSAvoidADC-induced DC offset
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and isolates the ADC-induced DC offset from the calibration process. By using a calibration circuit that bypasses the ADC or uses separate measurement paths, the method removes the ADC's DC offset contribution from the calibration measurements. This allows accurate determination of the DAC's intrinsic DC offset without the contaminating effect of ADC offset, enabling precise calibration while eliminating the harmful ADC-induced offset at the DAC output.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10812094B2Calibration method applied to digital-to-analog converter and associated circuit
Publication Date: 2020.10.20 REALTEK SEMICON CORP
  • US10812094B2 patent drawing
  • US10812094B2 patent drawing
  • US10812094B2 patent drawing

AI summary

The present invention provides a calibration method applied to a DAC, wherein the calibration method includes the steps of: generating a first digital input signal to the DAC to generate a first analog signal; using an ADC to generate a first digital output signal according to the first analog signal; generating a second digital input signal to the DAC to generate a second analog signal; swapping a polarity of the second analog signal to generate a swapped signal; using the ADC to generate a second digital output signal according to the swapped signal; and generating a digital calibration signal according to the first digital output signal and the second digital output signal, to control a calibration circuit to generate an analog calibration signal or to determine a polarity direction of a DC offset that is to be calibrated.