DAC Serial Interface for Non-Volatile Power-Up Output
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Solution Overview
Problem
Digital-to-analog converter (DAC) devices lose configuration information and input data when power is removed, requiring reprogramming upon power-up, which delays system initialization and reduces efficiency.
Innovation Solution
Incorporating non-volatile memory, such as EEPROM or FLASH, into DAC devices to store configuration information and digital voltage values, and developing a serial data interface communication protocol to access both volatile and non-volatile memories, allowing for preprogrammed outputs upon power-up and reducing interface communication time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If volatile memory is used to store configuration information and input data in DAC devices, then the device complexity is reduced, but the configuration information and input data are lost when power is removed, requiring reprogramming upon power-up
Solution Approach 1:
The memory system is segmented into two distinct parts: volatile memory for temporary data storage and non-volatile memory for persistent configuration storage. This segmentation allows the DAC device to maintain configuration information across power cycles while keeping the overall memory structure manageable and organized.
Solution Approach 2:
Configuration information is pre-stored in non-volatile memory during manufacturing or initial setup. When power is restored, this pre-stored configuration is automatically loaded into volatile memory and applied to the DAC registers, eliminating the need for manual reprogramming and ensuring immediate operational readiness.
2Device complexity
If volatile memory is used to store DAC register data, then the interface communication protocol is simplified, but additional program cycles are required to reprogram the DAC register upon power-up, reducing system productivity
Solution Approach 1:
The configuration data is prepared and stored in non-volatile memory in advance, so that upon power-up, the DAC device can immediately retrieve and apply the pre-stored configuration without requiring lengthy reprogramming sequences, thus maintaining fast initialization.
Solution Approach 2:
The DAC device automatically loads its configuration from non-volatile memory to volatile memory and configures its registers without external intervention immediately upon power-up. This self-service capability eliminates the need for external controllers to initiate complex initialization sequences, improving system productivity.
3Device complexity
If the DAC register must be reprogrammed upon power-up, then the volatile memory structure is maintained, but other devices dependent upon the DAC device must wait until the DAC register contains the correct data, increasing loss of time
Solution Approach 1:
Configuration parameters are pre-configured and stored in non-volatile memory before power interruption. Upon power restoration, these parameters are automatically loaded and applied to the DAC registers, allowing dependent devices to resume operation immediately without waiting for reprogramming sequences.
Solution Approach 2:
The DAC device performs automatic self-initialization by loading configuration from non-volatile memory and configuring its registers without external control signals. This self-service initialization eliminates the waiting period for dependent devices, as the DAC becomes operational autonomously and immediately upon power-up.
Data Source
AI summary
A mixed signal device, e.g., digital-to-analog converter (DAC) device has a serial interface communication protocol that accesses volatile and/or nonvolatile memory and allows a preprogrammed output voltage whenever the mixed signal device is powered-up. However, unlike conventional DAC devices, DAC devices with non-volatile memory may need special interface communication protocols for effective operation of the DAC device and communications between a system master controller unit (MCU). Interface communications protocols that do not violate standard serial bus communications protocols are provided for communicating between the volatile and non-volatile memories of the DAC device so that the MCU may access the DAC device's memories (non-volatile and/or volatile memories).