DAC Pre-Compensation for Duty-Cycle Distortion and Bit-Level ISI

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Solution Overview

Problem

Existing digital-to-analog converters (DACs), particularly those with time-interleaved sub-DACs, suffer from duty-cycle distortion (DCD) and bit-level inter-symbol interference (ISI), which degrade performance, especially at higher operating frequencies, and existing solutions do not adequately address bit-level ISI.

Innovation Solution

A digital pre-compensation scheme is implemented using time domain-based mathematical modeling to extract DCD and bit-level ISI parameters, allowing for efficient correction of timing delays and amplitude response differences in DACs, improving the Signal-to-Noise-and-Distortion Ratio (SNDR) by 2 to 5 decibels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If time-interleaved sub-DACs are used to achieve high sampling rates, then the bandwidth and sampling rate are improved, but duty-cycle distortion and bit-level inter-symbol interference are introduced that degrade performance

Engineering Contradiction:
Improvesampling rateVSAvoidsignal quality
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by implementing pre-compensation filtering in the digital domain before the DAC converts to analog. The method extracts DCD and bit-level ISI parameters through time domain-based mathematical modeling, then applies correction filters to pre-distort the digital signal in the opposite direction of the expected distortion, thereby canceling out the distortion effects at the DAC output

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes parameter changes by adjusting the digital signal parameters (amplitude and timing) based on extracted distortion characteristics. The system dynamically modifies the digital input signal parameters to compensate for the anticipated DCD and bit-level ISI effects, transforming the signal characteristics to achieve distortion-free output

Inventive Principle:
Principle #35Parameter changes

2Reliability

If existing pre-compensation solutions are applied, then some distortion is corrected, but bit-level inter-symbol interference is not adequately addressed

Engineering Contradiction:
Improvedistortion correctionVSAvoidbit-level ISI
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent applies segmentation by separating the distortion compensation into distinct components: DCD compensation and bit-level ISI compensation. The method extracts parameters for each distortion type independently and applies dedicated correction filters for each, ensuring that both distortion mechanisms are addressed separately and effectively

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary digital pre-compensation filter between the digital signal source and the DAC. This intermediary component processes the digital signal to pre-correct both DCD and bit-level ISI effects before conversion, acting as a mediator that eliminates distortion without requiring changes to the DAC hardware itself

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250385815A1Duty-cycle distortion (DCD) and bit-level inter-symbol interference (ISI) pre-compensation for a digital-to-analog converter (DAC)
Publication Date: 2025.12.18 CIENA CORP
  • US20250385815A1 patent drawing
  • US20250385815A1 patent drawing
  • US20250385815A1 patent drawing

AI summary

Aspects of the subject disclosure may include, for example, obtaining a digital input signal for conversion into analog by a digital-to-analog converter (DAC), and performing filtering operations relating to the digital input signal, wherein the filtering operations provide one or more of pre-compensation for duty-cycle distortion (DCD) associated with the DAC and pre-compensation for bit-level inter-symbol interference (ISI) associated with the DAC. Other embodiments are disclosed.