DAC Resistor Ladder Scheme for Common-Mode Current Removal
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Solution Overview
Problem
Current digital-to-analog converters (DACs) face challenges in managing common-mode current, which leads to voltage headroom limitations, increased area occupation, and poor noise performance, especially with variations in process, voltage, and temperature (PVT).
Innovation Solution
The implementation of a DAC with a resistor ladder circuit and an adjustable resistance circuit or switches that sink common-mode current from shunt branches to a reference potential node, allowing for reduced common-mode noise and increased voltage headroom without area expansion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional common-mode current removal schemes are used, then common-mode current is removed, but voltage headroom is limited and area occupation increases
Solution Approach 1:
The patent combines the common-mode current removal function with the existing resistor ladder circuit by integrating adjustable resistance circuits at the middle nodes of the shunt branches. This merging approach eliminates the need for separate common-mode current removal circuits, thereby removing the area penalty while maintaining effective common-mode current suppression.
2Reliability
If traditional common-mode current removal schemes are used, then common-mode current is removed, but voltage headroom is limited
Solution Approach 1:
The patent employs dynamically adjustable resistance circuits at the middle nodes of the shunt branches, allowing the resistance values to be optimized for different operating conditions. This dynamic adjustment enables effective common-mode current removal across varying voltage levels without permanently limiting voltage headroom, as the resistance can be adapted to maintain optimal performance while preserving voltage range.
3Device complexity
If fixed resistance circuits are used, then circuit design is simple, but common-mode noise performance is poor with PVT variations
Solution Approach 1:
The patent implements adjustable resistance circuits whose parameters can be changed in response to PVT variations. By monitoring process, voltage, and temperature conditions and adjusting the resistance values accordingly, the system maintains optimal common-mode noise performance across different operating conditions without requiring a completely complex redesign.
4Reliability
If adjustable resistance circuits are added to remove common-mode current, then common-mode noise performance improves, but device complexity increases
Solution Approach 1:
The adjustable resistance circuits integrated into the resistor ladder circuit perform multiple functions: they provide common-mode current removal, enable differential mode operation optimization, and adapt to PVT variations. This multi-functionality reduces the need for separate dedicated circuits, thereby limiting the increase in overall device complexity while achieving improved common-mode noise performance.
Data Source
AI summary
Methods and apparatus for common-mode current removal in a digital-to-analog converter (DAC). An example DAC circuit generally includes a plurality of current-steering cells, a resistor ladder circuit coupled to the plurality of current-steering cells and having a plurality of shunt branches, and an adjustable resistance circuit coupled between middle nodes of the plurality of shunt branches and a reference potential node for the DAC circuit.