Digital DAC Resolution Boost Using LSB Enhancement Logic
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Solution Overview
Problem
Existing digital-to-analog converters (DACs) face challenges in achieving high resolution without increasing the number of DAC unit elements, leading to inefficiencies in chip area and power consumption.
Innovation Solution
A digital enhancement circuit is introduced to increase the resolution of a N-bit DAC to a N+1 bit DAC without adding more DAC unit elements. This is achieved by logically operating on the least significant bit (LSB) of the input data to generate a digital enhancement code bit, which controls the least significant DAC unit element to output a factored nominal current or voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If thermometer code is used to achieve high-resolution DAC, then monotonicity and DNL performance are improved, but the number of DAC unit elements increases exponentially requiring 2^N-1 elements for N-bit resolution
Solution Approach 1:
The patent segments the DAC into two functional parts: a coarse DAC handling the most significant bits (MSBs) and a fine DAC handling the least significant bits (LSBs). This segmentation allows the system to achieve high resolution without requiring all 2^N-1 unit elements to be active simultaneously, thus reducing the total number of analog elements needed while maintaining measurement precision.
Solution Approach 2:
The patent introduces a digital dimension to compensate for the reduced analog resolution. By using a digital correction mechanism that processes the LSBs separately and adds them back to the coarse DAC output, the system achieves N-bit resolution effectively without requiring N-bit analog precision throughout the entire signal path, thereby reducing the number of analog unit elements required.
2Measurement precision
If segmented DAC or coarse and fine DAC is used to improve resolution, then DAC resolution is improved, but power consumption and chip area increase
Solution Approach 1:
The patent segments the DAC operation in time and function: the coarse DAC operates continuously handling MSBs, while the fine DAC operates only during calibration phases handling LSBs. This temporal and functional segmentation allows the system to achieve high resolution without continuously powering all DAC components, significantly reducing power consumption compared to fully-parallel segmented architectures.
Solution Approach 2:
The patent applies partial action by activating only the necessary portion of the DAC circuitry at any given time. The fine DAC with its reduced number of unit elements is activated only when LSB precision is needed, rather than maintaining full-resolution capability continuously, thereby reducing overall power consumption while still achieving the required resolution when needed.
3Device complexity
If binary weighted code is used for DAC implementation, then circuit complexity is reduced, but monotonicity cannot be guaranteed due to potential mismatches
Solution Approach 1:
The patent segments the code representation into thermometer code for the coarse DAC (ensuring monotonicity for MSBs) and binary code for the fine DAC (maintaining simplicity for LSBs). This segmented coding approach allows the system to guarantee monotonicity where it matters most (in the coarse conversion) while keeping the overall circuit complexity manageable through the simplicity of binary encoding in the fine conversion stage.
Data Source
AI summary
Described herein are apparatus and methods for digitally enhancing digital-to-analog converter (DAC) resolution. A digitally enhanced DAC includes a decoder circuit configured to convert a N-bit input data to at least N code bits, a digital enhancement circuit configured to logically operate on a least significant bit (LSB) of the N-bit data, and a switching network including at least N DAC unit elements, where a least significant DAC unit element is controlled by the digital enhancement circuit to output a factored nominal current or voltage when a logical operation outputs a defined logic level for the LSB and to output a nominal current or voltage absent output of the defined logic level and a remaining DAC unit elements are controlled by a remaining code bits of the at least N code bits. This provides a N+1 bit resolution for the DAC without increasing the at least N DAC unit elements.