Programmable DAC Sawtooth Generation for Stable PWM Duty Cycles
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Solution Overview
Problem
Switch-mode power supplies face instability when the duty cycle of control pulses exceeds 50%, and existing solutions are complex and inefficient.
Innovation Solution
A programmable digital-to-analog converter generates a decreasing sawtooth signal using a digital stage with registers for storing maximum and decrement values, and a subtractor to control the pulse width, preventing instability by adjusting the comparison reference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If tables of values are used for slope compensation, then system stability is improved, but device complexity increases significantly
Solution Approach 1:
The patent replaces complex lookup tables with a simple digital counter and subtractor circuit that generates the sawtooth waveform through basic arithmetic operations. This substitution of mechanical/complex storage structures with simple digital logic elements resolves the contradiction by maintaining stability functionality while dramatically reducing device complexity
Solution Approach 2:
The patent changes the approach from storing pre-computed values to dynamically generating values through simple decrement operations. By changing from a static table-based system to a dynamic counter-based system, the patent achieves the same stability effect with much simpler circuitry
2Productivity
If duty cycle exceeds 50%, then power conversion efficiency is improved, but system stability deteriorates
Solution Approach 1:
The patent applies preliminary anti-action by introducing a decreasing sawtooth signal that counteracts the tendency toward instability before it occurs. The sawtooth waveform is subtracted from the ramp signal in advance, preventing subharmonic oscillations from developing even when duty cycle exceeds 50%, thus allowing high efficiency operation while maintaining stability
Data Source
AI summary
A programmable digital-to-analog converter includes an analog circuit that converts a binary word into a value of analog voltage and a digital circuit that supplies the binary word starting from a maximum value decremented by a decrement value.


