High Speed Digital-to-Analog Converter Using Schottky Diode Sampling
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Solution Overview
Problem
High-speed digital-to-analog converters face limitations in operating speed due to switching speed limitations of MOSFETs and BJTs, and impedance mismatching issues, making it difficult to support high-frequency and scalable conversions of different bit numbers and frequencies.
Innovation Solution
The implementation of a high-speed digital-to-analog converter using Schottky diodes in sampler circuits and an R-2R resistive ladder network or Wilkinson power combiner for impedance matching, enabling efficient sampling and summation of digital signals to produce analog outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If MOSFETs or BJTs are used as switches in DACs, then the DAC can be constructed with conventional digital circuits, but the operating speed is limited due to severe switching speed limitations inherent in their intrinsic operating characteristics
Solution Approach 1:
The patent changes the fundamental parameter of switching device type from MOSFETs/BJTs to Gunn diodes, exploiting the negative resistance characteristic and domain switching mechanism of Gunn diodes to achieve ultra-high speed operation at 100 GHz, overcoming the intrinsic switching speed limitations of conventional transistors
Solution Approach 2:
The patent replaces the charge-based switching mechanism of MOSFETs and BJTs with the domain switching mechanism of Gunn diodes, which operates on different physical principles (electromagnetic domain propagation rather than charge carrier movement), enabling significantly higher operating speeds
2Reliability
If buffer amplifiers are inserted to match impedances, then impedance matching is improved, but the bandwidth requirement becomes extremely broad from DC to several harmonic frequencies, which is difficult to achieve
Solution Approach 1:
The patent segments the impedance matching function into multiple discrete stages along the signal path, with each stage providing matching for a specific frequency range, thereby achieving ultra-broadband matching without requiring a single amplifier to cover the entire bandwidth from DC to several harmonics
Solution Approach 2:
The patent introduces intermediate impedance matching networks between the Gunn diode switches and the transmission lines, acting as mediators that transform impedances at different stages to achieve overall broadband matching, avoiding the need for a single ultra-broadband buffer amplifier
3Speed
If the line length between components is increased to support higher speeds, then signal transmission distance increases, but wave reflection and signal shape corruption increase due to poor impedance matching
Solution Approach 1:
The patent implements preliminary impedance matching at each component interface before signal transmission occurs, ensuring that impedance is matched in advance to prevent wave reflection and signal corruption, allowing longer line lengths to be used without compromising signal integrity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for scalable high-speed digital-to-analog conversion with improved impedance matching, reducing signal corruption and enabling efficient conversion of various bit numbers and frequencies, thereby overcoming the limitations of existing DACs.
Implementation Method 1
Schottky diodes are one of the fastest switching devices available and can be made to have a very small input capacitance and resistance, the sampler circuits preferably utilize Schottky diodes to provide sampling of the digital signals
Implementation Method 2
The summer may include for example, an R-2R resistive ladder network or a Wilkinson power combiner
Implementation Method 3
The summer may include for example, an R-2R resistive ladder network or a Wilkinson power combiner
Data Source
AI summary
A digital-to-analog converter supporting high speed operation is defined. The converter includes a plurality of sampler circuits in electrical communication with a digital signal source and a summation circuit in electrical communication with the plurality of sampler circuits. A sampler circuit of the plurality of sampler circuits is adapted to sample a bit of a plurality of bits from the digital signal source with a half-sinusoidal signal forming a sampled signal. The sampler may include a plurality of diodes and a sinusoidal signal source. The sinusoidal signal source toggles the plurality of diodes on and off thereby forming the sampled signal at a sampler output port. The summation circuit is adapted to combine the sampled signal from each of the plurality of sampler circuits to form an analog signal portion representative of the plurality of bits. Exemplary summation circuits include an R-2R resistance ladder and a Wilkinson power combiner.


