DAC Self-Calibration for Static Mismatch in CT Delta-Sigma Modulators
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Solution Overview
Problem
Digital-to-analog converters (DACs) in continuous-time delta-sigma modulators suffer from static mismatch errors, which degrade the accuracy of analog-to-digital conversion and are not effectively corrected by existing noise-shaping techniques.
Innovation Solution
A digital calibration technique that utilizes the DAC unit elements themselves to measure and correct static mismatch errors by forcing individual elements to output complementary values and using external or internal DC offsets to determine relative errors, without requiring additional circuitry beyond logic design inside DAC drivers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If noise-shaping techniques are used to correct DAC errors, then conversion accuracy is improved, but static mismatch errors are not effectively corrected
Solution Approach 1:
The patent changes the operational parameters of DAC unit elements by forcing them to output complementary values (swapping 0 and 1 states) during calibration phases. This parameter manipulation allows the system to measure and correct static mismatch errors by comparing outputs when elements are in opposite states, thereby resolving the limitation of conventional noise-shaping techniques that cannot address static mismatches
2Measurement precision
If additional circuitries are added to measure DAC mismatch errors, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent implements a self-service calibration mechanism where the DAC unit elements measure each other's mismatch errors through their own operational states. By forcing individual elements to complementary values and using the ADC to measure the resulting outputs, the system achieves precise mismatch measurement without requiring external measurement circuitries, thus maintaining simplicity while improving accuracy
Solution Approach 2:
The calibration methodology uses the existing ADC and DAC components for dual purposes: normal conversion operations and mismatch error measurement. The same DAC unit elements that perform conversion also serve as measurement tools by forcing them into complementary states, eliminating the need for dedicated measurement circuitry and reducing overall device complexity
3Object-generated harmful factors
If calibration is performed to reduce static mismatch errors, then harmonic distortion is reduced, but calibration time and complexity increase
Solution Approach 1:
The patent performs calibration actions in advance by forcing DAC unit elements into complementary states and measuring their outputs before normal operation. This preliminary calibration establishes correction data that can be used to reduce harmonic distortion, allowing the system to achieve lower distortion levels without incurring time penalties during actual signal conversion
Solution Approach 2:
The calibration process is implemented as a periodic operation that can be performed at predetermined intervals or during unused time slots. By scheduling calibration periodically rather than continuously, the system reduces harmonic distortion while minimizing the time impact on normal operations, achieving a balance between distortion reduction and operational efficiency
Data Source
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AI summary
Digital-to-analog converters (DACs) are used widely in electronics. The DACs are usually not ideal and typically exhibits errors, e.g., static mismatch errors. This disclosure describes a digital calibration technique for DAC static mismatch in continuous-time delta-sigma modulators (CTDSMs). The methodology utilizes the DAC unit elements (UEs) themselves to measure each other's mismatch. There are no extra circuitries except for the logic design inside DAC drivers or comparators. The methodology is an attractive calibration technique for high performance CTDSMs, especially for high speed system in multi-gigahertz range with low over-sampling rate (OSR).