DAC Background Calibration Using Single-Bin Error Detection

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Solution Overview

Problem

Integrated circuits in data converters suffer from imperfections that cause noise and spurs, degrading performance and affecting other signal chain components, necessitating effective calibration methods to minimize errors.

Innovation Solution

A background calibration technique for digital-to-analog converters (DACs) using redundant DAC cells to generate reference and calibration tones with opposite polarities, allowing for efficient error detection and minimization in a single frequency bin, without disrupting normal operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional calibration methods are used to remove noise and spurs, then measurement precision improves, but processing overhead and system complexity increase

Engineering Contradiction:
Improveerror detection accuracyVSAvoidcalibration system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The calibration stimulus is segmented into multiple frequency components, with each component targeting specific error types (static vs. dynamic errors). The redundant DAC cells are divided into subsets that receive different weighted versions of the calibration stimulus, allowing parallel calibration of multiple error sources simultaneously without increasing overall system complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The same redundant DAC cells serve multiple functions: they act as both calibration devices for error measurement and as functional DAC cells for normal operation. The calibration stimulus generator and error detector are integrated into the existing DAC architecture, allowing the system to perform both calibration and data conversion functions without adding separate dedicated calibration hardware

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If background calibration is performed during normal operation, then productivity is maintained, but measurement precision may be compromised due to signal interference

Engineering Contradiction:
Improvecontinuous operation capabilityVSAvoiderror tone detection accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The calibration stimulus is applied periodically at specific frequency bins that are distinct from the normal data signal frequencies. This periodic application allows the error detector to distinguish calibration-induced error tones from normal operational signals, maintaining measurement precision while enabling continuous productivity during background calibration

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The redundant DAC cells act as intermediaries that receive the calibration stimulus and generate error tones that can be detected without interfering with the main data signal path. The error detector uses these intermediary error tones to measure DAC cell mismatches while the main DAC continues normal data conversion operations

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If redundant DAC cells are used for calibration, then manufacturing precision improves, but device complexity increases

Engineering Contradiction:
ImproveDAC cell matching accuracyVSAvoidnumber of DAC cells
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The DAC system uses its own redundant cells to perform self-calibration, measuring and correcting its own errors without requiring external calibration equipment. The calibration process is automated through digital signal processing that identifies error tones and adjusts DAC cell weights accordingly, improving manufacturing precision while the redundancy is already present in the design

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12401371B2Calibration of digital-to-analog converters
Publication Date: 2025.08.26 ANALOG DEVICES INC
  • US12401371B2 patent drawing
  • US12401371B2 patent drawing
  • US12401371B2 patent drawing

AI summary

Techniques that enable calibration of digital-to-analog Converters (DACs) with minimal processing overhead. A single frequency bin can be used to calibrate errors between bits. A low frequency feedback path can be included into a low frequency low power ADC to determine the error signal that exists in the calibration bin. The bits are calibrated when this error signal is minimized. The calibration techniques described provide an extremely efficient and optimal calibration at the DAC output of both static and dynamic errors.