DAC Resolution Enhancement Using Soft Quantization and Trellis Search

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Solution Overview

Problem

Conventional digital-to-analog converters (DACs) in high-speed communication systems face limitations due to limited resolution, leading to quantization distortions and increased power consumption, which restricts the capacity and efficiency of high-order modulation formats and symbol rates in optical and other communication systems.

Innovation Solution

A method employing dynamic quantization through a Digital-Resolution-Enhancer (DRE) block that uses Soft Quantization and Viterbi algorithm to optimize quantization decisions, reducing quantization noise and enabling effective pre-compensation with lower-resolution DACs, thereby improving signal-to-quantization-noise ratio (SQNR) and allowing for higher transmission rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If high-resolution DACs are used to reduce quantization distortions, then SQNR is improved, but power consumption and device complexity increase significantly

Engineering Contradiction:
Improvequantization precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The invention applies Digital Pre-Compensation (DPC) to pre-distort the digital signal before DAC conversion, anticipating and counteracting the effects of bandwidth limitation and quantization noise. By modifying the signal in advance, the system achieves better SQNR and compensates for channel impairments without requiring higher-resolution DACs, thus avoiding increased power consumption.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the approach from changing DAC resolution to changing signal parameters through DPC. Instead of increasing DAC bits to reduce quantization noise, the system modifies signal characteristics (amplitude, phase, timing) through pre-compensation filters, achieving equivalent or better performance with lower-resolution, lower-power DACs.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If high-order modulation formats are used to increase capacity, then spectral efficiency is improved, but susceptibility to quantization distortions and channel impairments increases

Engineering Contradiction:
Improvespectral efficiencyVSAvoidtolerance to quantization distortions
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The invention applies DPC to pre-compensate for channel impairments and quantization effects before the signal undergoes high-order modulation. By anticipating the distortions that will affect high-order modulations more severely, the system pre-applies corrective transformations, enabling reliable transmission of complex modulation schemes like 64-QAM or 128-QAM that would otherwise be too susceptible to quantization noise.

Inventive Principle:
Principle #9Preliminary anti-action

3Speed

If extensive Digital Signal Processing is implemented to overcome bandwidth limitations, then transmission rate is improved, but quantization distortions become more dominant

Engineering Contradiction:
Improvetransmission rateVSAvoidsignal precision
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The invention reverses the conventional approach by applying DPC at the transmitter before DAC conversion rather than performing extensive DSP at the receiver. This preliminary action reduces the dynamic range requirements and minimizes quantization distortions before they are introduced, allowing high-speed transmission without sacrificing signal precision.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10868561B2Digital resolution enhancement for high speed digital-to-analog converters
Publication Date: 2020.12.15 BG NEGEV TECHNOLOGIES & APPLICATIONS LTD
  • US10868561B2 patent drawing
  • US10868561B2 patent drawing
  • US10868561B2 patent drawing

AI summary

A method for increasing the effective resolution of digital-to-analog conversion for the purpose of digital pre-distortion to compensate distortions of a communication channel, according to which a digital sequence of N samples x(n) to be transmitted over the communication channel are received and several quantization possibilities are generated by performing Soft Quantization (SQ) on each sample, using a soft quantizer, where low computational complexity is maintained by limiting the number of SQ possibilities. The Instantaneous costs for each possible SQ error is computed and converging paths in the Trellis diagram, which represents possible states and transitions between them, for each sample is eliminated. Then the averaged errors for each remaining path are computed and Hard-Quantization is performed to eliminate converging paths and to keep a constant number of states. These steps are repeated N times, one time for each sample and the optimal path with the lowest averaged error selecting. Then the sequence associated with the optimal path is fed into the DAC.