Digital-to-Analog Conversion With Sub-Harmonic Error Mitigation

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Solution Overview

Problem

Digital-to-analog conversion systems are plagued by periodic errors, including periodic offset, gain, and timing errors, which result in inaccuracies in the analog output signal due to signal leakage and mismatches among converters, leading to impaired conversion accuracy.

Innovation Solution

The implementation of a modified digital signal generator that incorporates a cyclic error mitigation scheme, using sub-harmonic clock signals to lock in phase with periodic errors, and includes summing, multiplying, and filtering components to generate modified digital signals that mitigate these errors, thereby reducing periodic offset, gain, and timing errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If digital-to-analog conversion systems use auxiliary circuits operating at sub-harmonic clock signals, then system functionality is enhanced, but periodic leakage signals cause periodic offset errors that degrade conversion accuracy

Engineering Contradiction:
Improvesystem functionalityVSAvoidconversion accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent measures the periodic offset error caused by leakage signals and uses this error information to generate correction values. By summing these correction values with the digital input signal, the system converts the harmful periodic offset error into a beneficial correction mechanism, thereby eliminating the accuracy degradation while maintaining system functionality.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Productivity

If digital-to-analog conversion systems use interleaved digital-to-analog converters, then conversion speed is improved, but mismatches among converters cause periodic gain and timing errors that degrade conversion accuracy

Engineering Contradiction:
Improveconversion speedVSAvoidconversion accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent measures the periodic gain and timing errors resulting from mismatches among interleaved converters. These measured errors are used to generate correction values that are summed with the digital input signal, creating a feedback loop that continuously compensates for the accuracy-degrading mismatches while maintaining the high conversion speed provided by the interleaved architecture.

Inventive Principle:
Principle #23Feedback

3Measurement precision

If periodic offset error is present in the digital-to-analog conversion system, then the error appears directly in the analog output signal, but correction can be applied by summing correction values with the digital input signal

Engineering Contradiction:
Improveconversion accuracyVSAvoidsignal processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent performs preliminary measurement of the periodic offset error and pre-calculates correction values before the actual conversion process. These correction values are stored and then summed with the digital input signal in advance, eliminating the need for complex real-time correction mechanisms during conversion, thereby reducing signal processing complexity while improving conversion accuracy.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7450044B2Sub-harmonic image mitigation in digital-to-analog conversion systems
Publication Date: 2008.11.11 KEYSIGHT TECHNOLOGIES INC
  • US7450044B2 patent drawing
  • US7450044B2 patent drawing
  • US7450044B2 patent drawing

AI summary

A digital-to-analog conversion system comprises a digital input, a digital-to-analog converter and a modified digital signal generator. The digital-to-analog converter has a conversion frequency and is subject to a periodic error having a periodicity equal to that of an N-th sub-harmonic of the conversion frequency, where N is an integer. The digital input is operable to receive a digital input signal. The modified digital signal generator is interposed between the digital input and the digital-to-analog converter and is operable in response to the digital input signal to generate a modified digital signal. The modified digital signal comprises a dynamic digital mitigation component that mitigates the periodic error of the digital-to-analog converter.