DAC Output Switching Circuit With Voltage-Limited Leakage Control
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Solution Overview
Problem
Integrated circuits with digital-to-analog converters experience significant current leakage at high temperatures, particularly when switching modes, which affects the precision of analog signals, especially when converting lowest or highest digital values, leading to inaccuracies in signal output.
Innovation Solution
Incorporating a switching circuit with PMOS and NMOS transistors and a voltage control circuit that adjusts the drain-source voltage of these transistors based on the digital word value, ensuring consistent voltage levels regardless of the analog signal's voltage, thereby reducing current leakage across a wide temperature range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If switches are used at the output of the digital-to-analog converter for mode switching, then the integrated circuit can address different functionalities, but current leakage increases significantly at high temperatures
Solution Approach 1:
A voltage control circuit is introduced as an intermediary between the digital-to-analog converter output and the switching circuit. This control circuit dynamically adjusts the voltage levels at the transistor gates to minimize current leakage while maintaining proper switching functionality across different operating modes
Solution Approach 2:
The patent dynamically changes the voltage parameters (gate-source voltage, drain-source voltage) of the PMOS and NMOS transistors based on the digital word value and operating conditions. By adjusting these voltage parameters, the transistor leakage currents are minimized while maintaining the required switching behavior
2Temperature
If the digital-to-analog converter operates at extreme temperatures (-40°C to 140°C), then the integrated circuit can function in restrictive environments, but current leakage modifies the analog signal value by at least one low-order bit
Solution Approach 1:
The voltage control circuit implements a feedback mechanism where the digital word value is used to control the voltage applied to the transistor gates. This feedback approach ensures that the transistor operating points are optimized to minimize leakage currents that would otherwise degrade the analog signal precision at extreme temperatures
Solution Approach 2:
The patent applies preliminary counter-actions by pre-biasing the transistors with controlled voltages before the actual conversion and switching operations. This preliminary voltage control prevents excessive leakage currents from developing, thereby protecting the analog signal precision even when operating at temperature extremes
3Ease of operation
If the switch is open to transmit signal to internal electronic element, then internal component operation is enabled, but current leakage through the switch increases
Solution Approach 1:
The patent employs dynamic voltage control of the switching transistors based on the digital word value. When the switch needs to be open for internal component operation, the control circuit dynamically adjusts the gate voltages to maintain the switch in a low-leakage state while still allowing signal transmission to the internal electronic element
Data Source
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AI summary
According to one aspect, an integrated circuit is proposed comprising: - a digital-to-analog converter (MDAC) configured to convert a digital word (DIGW) into an analog signal (SDAC), - a switching circuit comprising: o a first transistor (PMOS1) having a drain configured to receive the analog signal (SDAC) and a source connected to a drain of a second transistor (PMOS2), o a third transistor (NMOS1) having a drain configured to receive the analog signal (SDAC) and a source connected to a drain of a fourth transistor (NMOS2), - a voltage control circuit configured to apply a voltage to the source of the first transistor (PMOS1) and to the source of the third transistor (NMOS1) so as to limit a drain-source voltage of the first transistor (PMOS1) and a drain-source voltage of the third transistor (NMOS1) regardless of the value of said digital word.