Sigma-Delta DAC Switch Compensation for Second Harmonic Spurs
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Solution Overview
Problem
Conventional sigma-delta modulators (SDMs) suffer from non-linearities due to imbalances and parasitic capacitances in DAC switches, resulting in significant second harmonic spurs, which degrade performance.
Innovation Solution
The implementation of a DAC switch with compensation circuits and buffers that correct for switch offsets and parasitic capacitances, using programmable current sources and RC networks to mitigate these issues, thereby improving the SDM's performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional DAC switches are used in SDM, then the device complexity is low, but non-linearities and second harmonic spurs occur due to switch imbalances and parasitic capacitances
Solution Approach 1:
The DAC switch is divided into first and second paths with separate buffers (first buffer and second buffer) controlling each path independently. This segmentation allows separate compensation of each path, reducing the impact of imbalances and parasitic capacitances while maintaining manageable device complexity through modular architecture
Solution Approach 2:
Compensation circuits are introduced as intermediary elements between the control signal and the DAC switches. These compensation circuits generate corrected control signals that compensate for switch imbalances and parasitic effects, thereby improving linearity without requiring fundamental changes to the overall DAC structure
2Measurement precision
If compensation circuits are added to correct switch offsets, then linearity improves, but device complexity increases
Solution Approach 1:
Compensation is applied locally at each DAC switch path rather than globally across the entire SDM. Each path has its own compensation circuit that addresses specific local imbalances and parasitic effects, improving signal accuracy where needed while avoiding unnecessary complexity in other parts of the system
Solution Approach 2:
The compensation circuits modify control signal parameters (timing, voltage levels) to counteract the effects of switch imbalances and parasitic capacitances. By changing these parameters dynamically, the system achieves better linearity and signal accuracy without requiring complete redesign of the DAC architecture
Data Source
AI summary
In higher order sigma-delta modulators (SDMs), there are oftentimes errors introduced by the digital-to-analog (DAC) switches. Namely, parasitic capacitances associated with switches can introduce second harmonic spurs. Here, however, compensation circuits and buffers are provided. The buffers bias the switches in saturation, and the compensation circuits provide a “ground boost” for the buffers. The combination of the buffer and compensation circuit reduces the second harmonic spur, while also improving the Signal-to-Noise Ratio (SNR) and Signal-to-Noise-plus-Distortion Ratio (SNDR).